UPD75238 Datasheet, PDF (62/190 Pages) NEC – 4 BIT SINGLE-CHIP MICROCOMPUTER

µPD75238
(3) Basic interval timer mode register (BTM)
BTM is a 4-bit register that controls operation of the basic interval timer.
The BTM contents are set by using a 4-bit memory manipulation instruction.
Bit 3 can be independently set using a bit manipulation instruction.
When bit 3 is set to 1, the contents of the basic interval timer are cleared, and the basic interval timer
interrupt request flag (IRQBT) is also cleared (to start the basic interval timer).
A RESET input clears the contents to 0, and the longest interrupt request signal generation interval time
is set.
Fig. 4-24 Format of the Basic Interval Timer Mode Register
Address ₃
2
1
0
F85H BTM3 BTM2 BTM1 BTM0
Symbol
BTM
(Frequency when fX = 6.0 MHz)
Input clock specification
000
011
10 1
111
Other setting
fX/2¹² (1.46 kHz)
fX/2⁹ (11.7 kHz)
fX /2⁷ (46.9 kHz)
fX/2⁵ (188 kHz)
Not to be set
Interrupt interval time
(wait time for releasing standby)
2²⁰/fX (175 ms)
2¹⁷/fX (21.8 ms)
2¹⁵/fX (5.46 ms)
2¹³/fX (1.37 ms)
–
(Frequency when fX = 4.19 MHz)
Input clock specification
000
011
101
111
Other setting
fX/2¹² (1.02 kHz)
fX/2⁹ (8.18 kHz)
fX /2⁷ (32.768 kHz)
fX/2⁵ (131 kHz)
Not to be set
Interrupt interval time
(wait time for releasing standby)
2²⁰/fX (250 ms)
2¹⁷/fX (31.3 ms)
2¹⁵/fX (7.82 ms)
2¹³/fX (1.95 ms)
–
Basic interval timer start control bit
When “1” is written to this bit, the basic interval timer operation starts (the counter
and the interrupt request flag are cleared).
When the operation starts, this bit is automatically reset to 0.
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