UPD17201A Datasheet, PDF (51/120 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTERS

µPD17201A, 17207
CMPVAL
ADCNV:
DAT
BANK0
INITFLG
MOV
MOV
REPT
NOP
ENDR
PUT
NOP
NOP
NOP
NOP
PEEK
MOV
MOV
NOP
PUT
NOP
NOP
NOP
NOP
PEEK
80H
; Reference voltage =VADC × CMPVAL/256
VREFEN,ADCEN,NOT ADCCH1,NOT ADCCH0 ; Starts sampling of input to ADC0
DBF0, #CMPVAL AND 0FH
DBF1, #CMPVAL SHR 4 and 0FH
9
Waits for at least 11 instruction cycles
until ADCR is set
ADCR,DBF
WR,.MF.ADCCMP SHR 4 AND 0FFFH
DBF0, #CMPVAL AND 0FH
DBF1, #CMPVAL SHR 4 AND 0FH
ADCR, DBF
WR,.MF.ADCCMP SHR 4 AND 0FFFH
; Holds input and starts comparison
Waits for at least 4 instruction cycles until
ADCCMP is checked
; Reads result of comparison (starts
sampling)
Waits for at least 3 instruction cycles until
ADCR is set
; Holds input and starts comparison
Waits for at least 4 instruction cycles until
ADCCMP is checked
; Reads result of comparison (starts
sampling)
(2) When subclock is being selected as system clock
Unlike when the main clock is selected, the wait times do not need to be set in software when the subclock
is selected. Setting the A/D conversion mode, ADCR, and reading ADCCMP are completed in one instruction
cycle, respectively.
An example of a program for A/D conversion when the subclock is selected is shown below.
CMPVAL
ADCNV:
DAT
BANK0
INITFLG
MOV
MOV
PUT
PEEK
80H
; Reference voltage = VADC × CMPVAL/256
VREFEN,ADCEN,NOT ADCCH1,NOT ADCCH0 ; Starts sampling a voltage input to the ADC0
pin.
DBF0,#CMPVAL AND 0FH
DBF1,#CMPVAL SHR 4 AND 0FH
ADCR,DBF
; Holds the Input and starts comparison
WR,.MF.ADCCMP SHR 4 AND 0FFFH
; Reads the result of comparison (and starts
sampling).
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