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UPD75104A Datasheet, PDF (41/66 Pages) NEC – 4-BIT SINGLE-CHIP MICROCOMPUTER
µPD75104A, 75108A
Instruc- Mne-
tions
monics
Operand
Inter- EI
rupt
Control DI
I/O
IN*
OUT*
CPU
HALT
Control STOP
NOP
Special SEL
GETI
IExxx
IExxx
A, PORTn
XA, PORTn
PORTn, A
PORTn, XA
RBn
MBn
taddr
Ma-
chine
Bytes Cyc-
les
Operation
Addressing
Area
Skip
Conditions
2
2 IME (IPS.3) ← 1
2
2 IExxx ← 1
2
2 IME (IPS.3) ← 0
2
2 IExxx ← 0
2
2 A ← PORTn
(n = 0-9, 12-14)
2
2
XA ← PORTn+1,PORTn (n = 4, 6, 8, 12)
2
2 PORTn ← A
(n = 2-9, 12-14)
2
2
PORTn+1, PORTn ← XA(n = 4, 6, 8, 12)
2
2 Set HALT Mode (PCC.2 ← 1)
2
2 Set STOP Mode (PCC.3 ← 1)
1
1 No Operation
2
2 RBS ← n (n = 0-3)
2
2 MBS ← n (n = 0, 1, 15)
1
3 • µPD75104A
*10
• Where TBR instruction,
.....P...C..1.1..-.0..←.....(.t.a...d..d..r..).3.-.0.+...(.t.a..d..d...r.+..1..)....
• Where TCALL instruction,
(SP-4)(SP-1)(SP-2) ← PC11-0
(SP-3) ← MBE, RBE, 0, 0
PC11-0 ← (taddr)3-0+(taddr+1)
SP ← SP-4
.........................................................
• Except for TBR and TCALL
instructions,
Instruction execution of
(taddr)(taddr+1)
.............................
Depends on
referenced
instruction
• µPD75108A
• Where TBR instruction,
.....P..C...1.2..-0...←.....(.t.a..d...d..r.)..4.-.0.+..(..t.a..d..d...r.+..1..)....
• Where TCALL instruction,
(SP-4)(SP-1)(SP-2) ← PC11-0
(SP-3) ← MBE, RBE, 0, PC12
PC12-0 ← (taddr)4-0+(taddr+1)
SP ← SP-4
.........................................................
• Except for TBR and TCALL
instructions,
Instruction execution of
(taddr)(taddr+1)
.............................
Depends on
referenced
instruction
*: When executing the IN/OUT instruction, MBE = 0, or MBE = 1, and MBS = 15.
Remarks: TBR and TCALL instructions are assembler instructions for GETI instruction table definition.
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