UPD16664 Datasheet, PDF (41/52 Pages) NEC – 144/160/184/208-OUTPUT LCD COLUMN SEGMENT DRIVER WITH RAM

{VCC2 = 2.4 to 3.0 V
Parameter
/OE,/WE recovery time
Address setup time
Address hold time
RDY output delay time
RDY float time ^{Note 1}
Wait status time ^{Note 2}
Ready status time (without conflict) ^{Note 2}
Ready status time (with conflict) ^{Note 2}
Data access time (read cycle) ^{Note 3}
Data float time (read cycle) ^{Note 1}
/CS - /OE time (read cycle)
/OE - /CS time (read cycle)
Write pulse width 1 (write cycle 1) ^{Note 2}
Write pulse width 2 (write cycle 2) ^{Note 2}
Data setup time (write cycles 1, 2)
Data hold time (write cycles 1, 2)
/CS - /WE time (write cycles 1, 2)
/WE - /CS time (write cycles 1, 2)
Reset pulse width
RDY - /OE time
RDY - /WE time
Notes 1. Load circuit
VCC2
1.8 kΩ
Symbol
Conditions
tRY
tAS
tAH
tRYR
tRYZ
tRYW
tRYF1
tRYF2
tACS
tHZ
tCSOE
tOECS
tWP1
tWP2
tDW
tDH
tCSWE
tWECS
tWRES
tRDOE
tRDWE
CL = 15 pF
1.0 kΩ
5 pF
µ PD16664
MIN.
40
20
30
20
30
60
60
30
30
20
30
120
TYP.
MAX.
Unit
ns
ns
ns
40
ns
40
ns
50
ns
120
ns
1600
ns
120
ns
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 4
–
Note 4
–
Data Sheet S13780EJ1V0DS00
41