UPD8870 Datasheet, PDF (4/24 Pages) NEC – 10680 PIXELS × 3 COLOR CCD LINEAR IMAGE SENSOR

µ PD8870
ABSOLUTE MAXIMUM RATINGS (TA = +25°C)
Parameter
Symbol
Ratings
Unit
Output drain voltage
Shift register clock voltage
Reset gate clock voltage
Reset feed-through level clamp clock
voltage
VOD
Vφ 1, Vφ 2, Vφ 1L, Vφ 2L
Vφ RB
Vφ CLB
−0.3 to +15
V
−0.3 to +8
V
−0.3 to +8
V
−0.3 to +8
V
Transfer gate clock voltage
Operating ambient temperature^Note
Storage temperature
Vφ TG1 to Vφ TG3
TA
Tstg
−0.3 to +8
V
0 to +60
°C
−40 to +70
°C
Note Use at the condition without dew condensation.
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the
verge of suffering physical damage, and therefore the product must be used under conditions that
ensure that the absolute maximum ratings are not exceeded.
RECOMMENDED OPERATING CONDITIONS (TA = +25°C)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Output drain voltage
Shift register clock high level
VOD
Vφ 1H, Vφ 2H, Vφ 1LH, Vφ 2LH
11.4
4.75
12.0
5.0
12.6
V
5.5
V
Shift register clock low level
Vφ 1L, Vφ 2L, Vφ 1LL, Vφ 2LL
−0.3
0
+0.3
V
Reset gate clock high level
Vφ RBH
4.5
5.0
5.5
V
Reset gate clock low level
Vφ RBL
−0.3
0
+0.5
V
Reset feed-through level clamp clock Vφ CLBH
high level
4.5
5.0
5.5
V
Reset feed-through level clamp clock
low level
Transfer gate clock high level
Transfer gate clock low level
Vφ CLBL
Vφ TG1H to Vφ TG3H
Vφ TG1L to Vφ TG3L
−0.3
4.5
−0.3
0
+0.5
V
Vφ
Note
1H
Vφ
Note
1H
V
0
+0.15
V
Data rate
fφ RB
−
2.0
10.0
MHz
Note When Transfer gate clock high level (Vφ TG1H to Vφ TG3H) is higher than Shift register clock high level (Vφ 1H),
Image lag can increase.
4
Data Sheet S15328EJ2V0DS