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UPD75P3018 Datasheet, PDF (35/60 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLER
µPD75P3018
Main System Clock Oscillation Circuit Characteristics (TA = –40 to +85 °C)
Resonator
Ceramic
resonator
Recomended Constants
VDD = 2.2 to 5.5 V
X1
X2
Parameter
Oscillation frequency
(fX) Note 1
Conditions
MIN.
1.0
TYP.
MAX.
6.0 Note 2
Unit
MHz
C1
C2
Oscillation
After VDD has
stabilization time Note 3 reached MIN. value
of oscillation voltage
VDD
range
Crystal
VDD = 2.2 to 5.5 V
Oscillation frequency
1.0
resonator
(fX) Note 1
X1
X2
C1
C2
Oscillation
VDD = 4.5 to 5.5 V
stabilization time Note 3
VDD
External
VDD = 1.8 to 5.5 V
X1 input frequency
1.0
clock
(fX) Note 1
X1
X2
4
ms
6.0 Note 2 MHz
10
ms
30
6.0 Note 2 MHz
X1 input high-/
low-level widths
(tXH, tXL)
83.3
500
ns
Notes 1. The oscillation frequency and X1 input frequency shown above indicate characteristics of the oscillation circuit
only. For the instruction execution time, refer to AC Characteristics.
2. When the supply voltage is 1.8 V ≤VDD < 2.7 V and the oscillation frequency is 4.19 MHz < fX ≤6.0 MHz, do
not select processor clock control register (PCC) = 0011 as the instruction execution time. If PCC = 0011, one
machine cycle is less than 0.95 µs, falling short of the rated value of 0.95 µs.
3. The oscillation stabilization time is the time required for oscillation to be stabilized after VDD has been applied
or STOP mode has been released.
Caution When using the main system clock oscillation circuit, wire the portion enclosed in the broken line in
the above figure as follows to prevent adverse influences due to wiring capacitance:
• Keep the wiring length as short as possible.
• Do not cross the wiring with other signal lines.
• Do not route the wiring in the vicinity of a line through which a high alternating current flows.
• Always keep the ground point of the capacitor of the oscillation circuit at the same potential as VDD.
• Do not ground to a power supply pattern through which a high current flows.
• Do not extract signals from the oscillation circuit.
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