UPD75064 Datasheet, PDF (31/68 Pages) NEC – 4-BIT SINGLE-CHIP MICROCOMPUTER

µPD75064, 75066, 75068, 75064(A), 75066(A), 75068(A)
Table 8-1. Status of All Hardware after Reset (2/2)
Serial
interface
Hardware
Shift register (SIO)
Operation mode register (CSIM)
SBI control register (SBIC)
Slave address register (SVA)
Clock genera-
tor, Clock
output circuit
Processor clock control register
(PCC)
System clock control register
(SCC)
Interrupt
function
Clock output mode register
(CLOM)
Interrupt
request flag
IRQ1, IRQ2,
and IRQ4
( IRQxxx ) Other than above
Interrupt enable flag (IE×××)
Interrupt master enable flag
(IME)
INT0, 1, 2, mode register
(IM0, IM1, IM2)
Digital port
Output buffer
Output latch
Input/output mode register
(PMGA, PMGB)
Pull-up resistor specification
register (POGA)
A/D converter Mode register (ADM)
SA register (SA)
Bit sequential buffer (BSB0-BSB3)
RESET input in standby mode
Retained
0
0
Retained
0
0
0
Undefined
0
0
0
0, 0, 0
Off
Clear (0)
0
0
04H
Undefined
Retained
RESET input during operation
Undefined
0
0
Undefined
0
0
0
Undefined
0
0
0
0, 0, 0
Off
Clear (0)
0
0
04H
Undefined
Undefined
31