UPG2006TB Datasheet, PDF (3/10 Pages) NEC – NECs 1.8 V L, S-BAND SPDT SWITCH

UPG2006TB
ELECTRICAL CHARACTERISTICS
(TA = +25°C, Vcont1 = 1.8 V, Vcont2 = 0 V or Vcont1 = 0 V, Vcont2 = 1.8 V, ZO = 50 Ω, Off chip DC blocking capacitors value; 51 pF,
unless otherwise specified)
Parameter
Symbol
Test Conditions
MIN. TYP. MAX. Unit
Insertion Loss
Isolation
Input Return Loss
Output Return Loss
Input Power at 1 dB
Compression Point ^Note2
Input Power at 0.1 dB
Compression Point ^Note2
Switching Speed
Control Current
LINS
ISL
RLin
RLout
Pin(1 dB)
Pin(0.1 dB)
tSW
f = 0.1 to 1.0 GHz ^Note1
f = to 2.0 GHz
f = to 2.5 GHz
f = 0.1 to 2.0 GHz ^Note1
f = to 2.5 GHz
f = 0.1 to 1.0 GHz ^Note1
f = to 2.5 GHz
f = 0.1 to 1.0 GHz ^Note1
f = to 2.5 GHz
f = 2.0 GHz, Vcont = 1.8 V/0 V
f = 2.0 GHz, Vcont = 2.8 V/0 V
f = 2.0 GHz, Vcont = 1.8 V/0 V
f = 2.0 GHz, Vcont = 2.8 V/0 V
Icont
Vcont = 1.8 V/0 V, RF Non
−
0.30
0.55
dB
−
0.40
0.60
dB
−
0.45
0.65
dB
25
29
−
dB
20
25
−
dB
13
−
−
dB
16
21
−
dB
13
−
−
dB
16
21
−
dB
17
20
−
dBm
22
25
−
dBm
−
18
−
dBm
−
23
−
dBm
−
50
200
ns
−
0.5
10
μA
Notes 1. Off chip DC blocking capacitors at frequency range of 0.1 to 0.5 GHz 1,000 pF
2. Pin(1 dB) or Pin(0.1 dB) is the input power level when the insertion loss increase 1 dB or 0.1 more than that of linear
range. All other characteristics are measured in linear range.
Cautions 1. It is necessary to use DC blocking capacitors for No.1 (OUT1), No.3 (OUT2) and No.5 (IN). The value of DC blocking
capacitors should be chosen to accommodate the frequency of operation, bandwidth, switching speed and the
condition with the actual board of the system.
The range of recommended DC blocking capacitor value is less than 100 pF.
2. The distance between the GND pin and ground pattern of the substrate should be as short as possible to reduce
parasitic parameters.