UPD750004 Datasheet, PDF (26/84 Pages) NEC – 4 BIT SINGLE-CHIP MICROCONTROLLER

µPD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)
6.6 CLOCK TIMER
The µPD750008 contains one channel for a clock timer. The clock timer provides the following functions:
• Sets the test flag (IRQW) with a 0.5 sec interval. The standby mode can be released by IRQW.
• The 0.5 second interval can be generated from either the main system clock (4.194304 MHz) or subsystem clock
(32.768 kHz).
• The time interval can be made 128 times faster (3.91 ms) by selecting the fast mode. This is convenient for
program debugging, testing, etc.
• Any of the frequencies 2.048 kHz, 4.096 kHz, and 32.768 kHz can be output to the P23/BUZ pin. This can be
used for beep and system clock frequency trimming.
• The frequency divider circuit can be cleared so that a zero-second start of the clock can be made.
From the
clock
generator
fX
128
(32.768 kHz)
fXT
(32.768 kHz)
Fig. 6-5 Clock Timer Block Diagram
fw _{(256 Hz: 3.91 ms)}
2⁷
fW
(32.768 kHz)
Selector
Frequency divider
(4 kHz) (2 kHz)
fw
fw
2³ 2⁴
Clear
fw
Selector
2¹⁴
2 Hz
0.5 sec
INTW
IRQW
set signal
Selector
Output buffer
P23/BUZ
WM
WM7 0 WM5 WM4 WM3 WM2 WM1 WM0
PORT2.3
P23 output
latch
Bit 2 of PMGB
Port 2 input/
output mode
Bit test instruction
8
Internal bus
( ) is for fX = 4.194304 MHz, fXT = 32.768 kHz.
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