UPD753204 Datasheet, PDF (22/80 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLERS

µPD753204, 753206, 753208
6.2 Clock Generator
The clock generator provides the clock signals to the CPU and peripheral hardware and its configuration is
shown in Figure 6-1.
The operation of the clock generator is determined by the Processor Clock Control Register (PCC).
The instruction execution time can also be changed.
• 0.95, 1.91, 3.81, 15.3 µs (system clock: @ 4.19-MHz operation)
• 0.67, 1.33, 2.67, 10.7 µs (system clock: @ 6.0-MHz operation)
Figure 6-1. Clock Generator Block Diagram
X1
VDD
System clock fX
oscillator
X2
· Basic interval timer (BT)
· Timer/event counter 0
· Timer counter 1, 2
· Watch timer
· LCD controller/driver
· Serial interface
· INT0 noise eliminator
· Clock output circuit
1/1 to 1/4096
Divider
1/2 1/4 1/16
Oscillation stop
PCC
PCC0
PCC1
4
PCC2
HALT^Note
PCC3
STOP^Note
PCC2,
PCC3
Clear
STOP F/F
QS
R
Note Instruction execution
Selector
Divider
1/4 Φ
· CPU
· INT0 noise eliminator
· Clock output circuit
HALT F/F
S
RQ
Wait release signal from BT
RESET Signal
Standby release signal from
interrupt control circuit
22