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UPD780973 Datasheet, PDF (219/301 Pages) NEC – 8-Bit Single-Chip Microcontrollers | |||
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CHAPTER 18 METER CONTROLLER/DRIVER
The relation among the ENn and MODn bits of the PMC register, DIRn1 and DIRn0 bits of the MCMPCn register,
and output pins is shown below.
ENn
0
1
1
1
1
1
1
1
1
MODn
Ã
0
0
0
0
1
1
1
1
DIRn1
Ã
0
0
1
1
0
0
1
1
DIRn0
Ã
0
1
0
1
0
1
0
1
SMn1
(sin+)
PORT
PWM
PWM
0
0
PWM
PWM
PORT
PORT
SMn2
(sinâ)
PORT
0
0
PWM
PWM
PORT
PORT
PWM
PWM
SMn3
(cos+)
PORT
PWM
0
0
PWM
PWM
PORT
PORT
PWM
SMn4
(cosâ)
PORT
0
PWM
PWM
0
PORT
PWM
PWM
PORT
Mode
Port mode
PWM mode full bridge
PWM mode half bridge
DIRn1 and DIRn0 mean the quadrant of sin and cos, and DIRn1, DIRn0 = 00 through 11 correspond to quadrants
1 through 4, respectively. The PWM signal is output to the specific pin of the + and â polarities of sin and cos
of each quadrant.
When ENn = 0, all the output pins are used as port pins regardless of MODn, DIRn1, and DIRn0.
When ENn = 1 and MODn = 0, the full bridge mode is set, and 0 is output to a pin that does not output a PWM
signal.
When ENn = 1 and MODn = 1, the half bridge mode is set, and the pin that does not output a PWM signal is
used as a port pin.
Caution The output polarity of the PWM output changes when MCNT overflows.
219
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