UPG2150T5L Datasheet, PDF (2/9 Pages) California Eastern Labs – GaAs INTEGRATED CIRCUIT

μPG2150T5L
PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM
(Top View)
12 11 10
(Top View)
12 11 10
1
91
2
82
3
73
456
456
Remark Exposed pad : GND
Pin No.
1
2
(Bottom View)
3
10 11 12
4
99
88
77
1
5
6
2
7
3
8
9
654
10
11
12
TRUTH TABLE
Vcont1
High
Low
Low
Vcont2
Low
High
Low
Vcont3
Low
Low
High
ANT−RF1
ON
OFF
OFF
ANT−RF2
OFF
ON
OFF
ANT−RF3
OFF
OFF
ON
ABSOLUTE MAXIMUM RATINGS (TA = +25°C, unless otherwise specified)
Parameter
Symbol
Switch Control Voltage
Vcont
Input Power1 (ANT−RF1, ANT−RF2) Pin1
Input Power2 (ANT−RF3)
Pin2
Operating Ambient Temperature
TA
Storage Temperature
Tstg
Ratings
−6.0 to +6.0 ^Note
+31.5
+25.5
−45 to +85
−55 to +150
Unit
V
dBm
dBm
°C
°C
Note ⎪Vcont (H) − Vcont (L)⎪ ≤ 6.0 V
RECOMMENDED OPERATING RANGE (TA = +25°C, unless otherwise specified)
Parameter
Operating Frequency
Switch Control Voltage (H)
Switch Control Voltage (L)
Symbol
fopt
Vcont (H)
Vcont (L)
MIN.
0.5
2.3
−0.2
TYP.
−
2.85
0
MAX.
2.5
3.6
0.2
Unit
GHz
V
V
Pin Name
ANT
GND
Vcont2
RF2
GND
RF3
Vcont3
GND
Vcont1
RF1
N.C.
N.C.
2
Data Sheet PG10653EJ02V0DS