UPD4481161 Datasheet, PDF (18/28 Pages) NEC – 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION

READ / WRITE CYCLE
1
2 _TKHKH 3
CLK
TEVKH TKHEX ^{TKHKL TKLKH}
/CKE
TCVKH TKHCX
/CEs ^{Note 1}
TADVVKH TKHADVX
ADV
TWVKH TKHWX
/WE
TWVKH TKHWX
/BWs ^{Note 2}
µPD4481161, 4481181, 4481321, 4481361
4
5
6
7
8
9
10
Address
A1
A2
TAVKH TKHAX
Data In
High-Z
D (A1)
D (A2)
Data Out
TDVKH TKHDX
High-Z
/G
A3
A4
A5
A6
D (A2+1)
High-Z
D (A5)
TKHQX1 TKHQX2
TGLQV TKHQZ
Q (A3) Q (A4)
TKHQV
TGHQZ
Q (A4+1)
High-Z
TKHQX2
TGLQX
A7
High-Z
Q (A6) Q (A7)
Command
WRITE
D (A1)
WRITE
D (A2)
BURST
WRITE
D (A2+1)
READ
Q (A3)
READ
Q (A4)
BURST
READ
Q (A4+1)
WRITE
D (A5)
READ
Q (A6)
WRITE
Q (A7)
DESELECT
Notes 1. /CEs refers to /CE, CE2 and /CE2. When /CEs is LOW, /CE and /CE2 are LOW and CE2 is HIGH. When
/CEs is HIGH, /CE and /CE2 are HIGH and CE2 is LOW.
2. /BWs refers to /BW1, /BW2, /BW3 and /BW4. When /BWs is LOW, any one or more byte write enables
(/BW1, /BW2, /BW3 or /BW4) are LOW.
18
Data Sheet M15561EJ3V0DS