UPD75237 Datasheet, PDF (136/191 Pages) NEC – 4-BIT SINGLE-CHIP MICROCOMPUTER

µPD75237
Address
3
FB4H IM03
Fig. 5-4 Edge Detection Mode Register Format
Symbol
2
1
0
0
IM01 IM00 IM0
Detection Edge Specification
0 0 Rising edge specification
0 1 Falling edge specification
1 0 Rising and falling edge specification
1 1 Ignored (interrupt request flag not set)
5
Sampling Clock
0 Φ (0.67, 1.33, 2.67, 10.7 µs: at 6.0 MHz operation)*1
1 fx/64 (10.7 µs: at 6.0 MHz operation)*2
FB5
0
0
0
IM10 IM1
0 Rising edge specification
1 Falling edge specification
* 1. 0.95, 1.91, 3.82, 15.3 µs at 4.19 MHz operation
2. 15.3 µs at 4.19 MHz operation
Note
If the edge detection mode register is changed, the interrupt request flag may be set. To prevent that from
occurring, disable interrupt and change edge detection mode register first, then enable interruption after
clearing the interrupt request flag by the CLR1 instruction. If fx/64 has been selected as sampling clock by
changing IM0, it is necessary to clear the interrupt request flag 16 machine cycles after the mode register
has been changed.
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