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UPD17068 Datasheet, PDF (12/341 Pages) NEC – 4-BIT SINGLE-CHIP MICROCONTROLLER CONTAINING IMAGE DISPLAY CONTROLLER AND PLL FREQUENCY SYNTHESIZER FOR DIGITAL TUNING SYSTEMS
µPD17068
12.4.4 Time Interval Error in Basic Timer 2 ........................................................................... 145
12.4.5 Cautions for Using Basic Timer 2 ................................................................................ 148
12.5 TIMER 0 ........................................................................................................................................... 150
12.5.1 Overview of Timer 0 ...................................................................................................... 150
12.5.2 Clock Selection Block .................................................................................................... 151
12.5.3 Count Block ..................................................................................................................... 152
12.5.4 Example of Using Timer 0 ............................................................................................ 155
12.5.5 Time Interval Error in Timer 0 ...................................................................................... 156
12.5.6 Cautions for Using Timer 0 .......................................................................................... 156
12.6 TIMER 1 ........................................................................................................................................... 157
12.6.1 Overview of Timer 1 ...................................................................................................... 157
12.6.2 Clock Selection Block .................................................................................................... 158
12.6.3 Count Block ..................................................................................................................... 159
12.6.4 Time Interval Error in Timer 1 ...................................................................................... 161
12.6.5 Cautions for Using Timer 1 .......................................................................................... 161
12.7 CLOCK TIMER ................................................................................................................................. 162
12.7.1 Overview of the Clock Timer ........................................................................................ 162
12.7.2 Clock Frequency Divider Block ..................................................................................... 163
12.7.3 Count Block ..................................................................................................................... 165
12.7.4 Reset Control Block ....................................................................................................... 169
12.7.5 32 kHz Oscillator and Oscillation Frequency Adjustment ........................................ 170
12.7.6 Cautions for Using the Clock Timer ............................................................................ 170
13. A/D CONVERTER ....................................................................................................................... 171
13.1 OUTLINE OF A/D CONVERTER .................................................................................................... 171
13.2 INPUT SWITCHING BLOCK ........................................................................................................... 172
13.3 COMPARE VOLTAGE GENERATION BLOCK AND COMPARE BLOCK .................................... 174
13.4 COMPARE TIMING CHART ........................................................................................................... 178
13.5 A/D CONVERTER PERFORMANCE .............................................................................................. 178
13.6 USING A/D CONVERTER .............................................................................................................. 179
13.6.1 Comparison with One Reference Voltage .................................................................. 179
13.6.2 Successive Approximation Based on the Binary Search Method .......................... 180
13.7 NOTES ON USING A/D CONVERTER .......................................................................................... 184
13.8 STATES UPON RESET ................................................................................................................... 184
13.8.1 Power-On Reset .............................................................................................................. 184
13.8.2 Clock Stop ....................................................................................................................... 184
13.8.3 CE Reset .......................................................................................................................... 184
14. D/A CONVERTER (PWM METHOD) ......................................................................................... 185
14.1 OUTLINE OF D/A CONVERTER .................................................................................................... 185
14.2 OUTPUT SWITCHING BLOCK ....................................................................................................... 186
14.3 DUTY CYCLE SETTING BLOCK ..................................................................................................... 188
14.4 CLOCK GENERATION BLOCK ....................................................................................................... 190
14.5 OUTPUT WAVEFORMS OF D/A CONVERTER ........................................................................... 190
14.6 NOTES ON USING D/A CONVERTER .......................................................................................... 191
14.7 STATES UPON RESET ................................................................................................................... 191
14.7.1 Power-On Reset .............................................................................................................. 191
14.7.2 Clock Stop ....................................................................................................................... 191
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