MC-45V16AD641 Datasheet, PDF (12/16 Pages) NEC – 16M-WORD BY 64-BIT VirtualChannel SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE

MC-45V16AD641
(2/2)
Byte No.
Function Described
Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Notes
31 Module bank density
10H 0
0
0
1
0
0
0
0 64M bytes
•
32 Address and command signal -A75 15H 0
0
0
1
0
1
0
1 1.5 ns
input setup time
-A10 20H 0
0
1
0
0
0
0
0 2 ns
•
33 Address and command signal -A75 08H 0
0
0
0
1
0
0
0 0.8 ns
input hold time
-A10 10H 0
0
0
1
0
0
0
0 1 ns
•
34 Data signal input setup time
-A75 15H 0
0
0
1
0
1
0
1 1.5 ns
•
35 Data signal input hold time
-A10 20H 0
0
1
0
0
0
0
0 2 ns
-A75 08H 0
0
0
0
1
0
0
0 0.8 ns
•
36 Prefetch read latency
-A10 10H 0
0
0
1
0
0
0
0 1 ns
-A75 04H 0
0
0
0
0
1
0
0 4 clocks
•
37
tPCD (MIN.)
-A10 04H 0
0
0
0
0
1
0
0 4 clocks
-A75 0FH 0
0
0
0
1
1
1
1 15 ns
-A10 14H 0
0
0
1
0
1
0
0 20 ns
38 Number of segment addresses
02H 0
0
0
0
0
0
1
0 2 bits
39 Number of channels
04H 0
0
0
0
0
1
0
0 16
40 Depth of channels
07H 0
0
0
0
0
1
1
1 128 bits
41-61
62 SPD revision
•
63 Checksum for bytes 0 - 62
•
02H 0
0
0
0
0
0
1
0 2.0
-A75 3EH 0
0
1
1
1
1
1
0
-A10 B2H 1
0
1
1
0
0
1
0
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91-92 Revision code
93-94 Manufacturing date
95-98 Assembly serial number
99-125 Mfg specific
Timing Charts
Please refer to the µPD4565421, 4565821, 4565161 Data sheet (M13022E).
12
Data Sheet M13823EJ6V0DS00