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UPD4702 Datasheet, PDF (11/16 Pages) NEC – INCREMENTAL ENCODER 8-BIT UP/DOWN COUNTER CMOS INTEGRATED CIRCUITS | |||
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20PIN PLASTIC DIP (300 mil)
20
11
µPD4702
1
10
A
K
I
P
L
J
H
C
F
G
B
D
NM
NOTES
1) Each lead centerline is located within 0.25 mm (0.01 inch) of
its true position (T.P.) at maximum material condition.
2) ltem "K" to center of leads when formed parallel.
M
R
ITEM MILLIMETERS INCHES
A
25.40 MAX. 1.000 MAX.
B
1.27 MAX. 0.050 MAX.
C
2.54 (T.P.) 0.100 (T.P.)
D
0.50±0.10
0.020
+0.004
â0.005
F
1.1 MIN.
0.043 MIN.
G
3.5±0.3
0.138±0.012
H
0.51 MIN.
0.020 MIN.
I
4.31 MAX. 0.170 MAX.
J
5.08 MAX. 0.200 MAX.
K
7.62 (T.P.) 0.300 (T.P.)
L
6.4
0.252
M
0.25
+0.10
â0.05
0.010
+0.004
â0.003
N
0.25
0.01
P
0.9 MIN.
0.035 MIN.
R
0~15 °
0~15°
P20C-100-300A,C-1
11
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