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UPD750104 Datasheet, PDF (10/80 Pages) NEC – 4 BIT SINGLE-CHIP MICROCONTROLLER
µPD750104, 750106, 750108, 750104(A), 750106(A), 750108(A)
3.2 Non-Port Pins
Pin name
TI0
PTO0
PTO1
PCL
BUZ
SCK
SO/SB0
SI/SB1
INT4
INT0
INT1
INT2
KR0 - KR3
KR4 - KR7
CL1
CL2
Input/
output
Input
Output
I/O
Input
Input
Input
Input
Input
-
-
Shared
pin
Function
P13
Inputs external event pulse to the timer/event
counter
P20
Timer/event counter output
P21
Timer counter output
P22
Clock output
P23
Arbitrary frequency output (for buzzer output or
system clock trimming)
P01
Serial clock I/O
P02
Serial data output
Serial data bus I/O
P03
Serial data input
Serial data bus I/O
P00
Edge detection vectored interrupt input (both
rising and falling edges are detected)
P10
Edge detection vectored interrupt input
Note 2
(detection edge selectable). A noise eliminator
P11
can be selected when INT0/P10 is used.
Note 3
P12
Rising edge detection testable input
Note 3
P60 - P63 Falling edge detection testable input
P70 - P73 Falling edge detection testable input
-
Pin for connecting a resistor (R) or capacitor (C)
for main system clock oscillation. An external
clock cannot be input.
When reset
Input
Input
Input
Input
Input
Input
-
I/O circuit
typeNote 1
B -C
E-B
F -A
F -B
M -C
B
B -C
F -A
F -A
-
XT1
XT2
RESET
IC
VDD
VSS
Input
-
Crystal connection pin for subsystem clock
-
-
generation. When external clock signal is used, it
is applied to XT1, and it reverse phase signal is
-
applied to XT2.
XT1 can be used as a 1-bit input (test).
Input
-
System reset input (active low)
-
B
-
-
Internally connected. (To be connected directly to
-
-
VDD)
-
-
Positive power supply
-
-
-
-
Ground potential
-
-
Notes 1. The circle ( ) indicates the Schmitt trigger input.
2. With a noise eliminator/asynchronously selectable
3. Asynchronous
10