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UPD64084 Datasheet, PDF (1/66 Pages) NEC – THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD64084
THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
DESCRIPTION
The µPD64084 realizes a high precision Y/C separation by the three-dimension signal processing for NTSC signal.
This product has the on-chip 4-Mbit memory for flame delay, a high precision internal 10-bit A/D converter and D/A
converter, and adapting 10-bit signal processing (only for luminance signal) and high picture quality. The µPD64084 is
completely single-chip system of 3D Y/C separation.
This LSI includes the Wide Clear Vision ID signal (Japanese local format) decoder and ID-1 signal decoder.
FEATURES
• On-chip 4-Mbit frame delay memory.
• 2 operation mode
Motion adaptive 3D Y/C separation
2D Y/C separation + Frame recursive Y/C NR
• Embedded 10-bit A/D converter (1ch), 10-bit D/A converters (2ch), and System clock generator.
• Embedded Y coring, Vertical enhancer, Peaking filter, and Noise detector.
• Embedded ID-1 signal decoder, and WCV-ID signal decoder.
• I2C bus control.
• Dual power supply of 2.5 V and 3.3 V.
For digital : DVDD = 2.5 V
For analog : AVDD = 2.5 V
For DRAM : DVDDRAM = 2.5 V
For I/O : DVDDIO = 3.3 V
ORDERING INFORMATION
Part number
µPD64084GC-8EA-ANote1
µPD64084GC-8EA-YNote2
Package
100-pin plastic LQFP (fine pitch) (14 × 14 mm)
100-pin plastic LQFP (fine pitch) (14 × 14 mm)
Notes 1. Lead-free product
2. High-thermal-resistance product
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. S16021EJ2V0DS00 (2nd edition)
Date Published March 2003 NS CP (K)
Printed in Japan
The mark shows major revised points.
2002