UPD442012A-X Datasheet, PDF (1/24 Pages) NEC – 2M-BIT CMOS STATIC RAM 128K-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD442012A-X
2M-BIT CMOS STATIC RAM
128K-WORD BY 16-BIT
EXTENDED TEMPERATURE OPERATION
Description
The µPD442012A-X is a high speed, low power, 2,097,152 bits (131,072 words by 16 bits) CMOS static RAM.
The µPD442012A-X has two chip enable pins (/CE1, CE2) to extend the capacity.
The µPD442012A-X is packed in 48-pin PLASTIC TSOP (I) (Normal bent).
Features
• 131,072 words by 16 bits organization
5 • Fast access time : 50, 55, 70, 85, 100, 120 ns (MAX.)
• Byte data control : /LB (I/O1 - I/O8), /UB (I/O9 - I/O16)
• Low voltage operation
(BB version : VCC = 2.7 to 3.6 V, BC version : VCC = 2.2 to 3.6 V, DD version : VCC = 1.8 to 2.2 V)
• Low VCC data retention : 1.0 V (MIN.)
• Operating ambient temperature : TA = –25 to +85 °C
• Output Enable input for easy application
• Two Chip Enable inputs : /CE1, CE2
Part number
Access time
Operating supply Operating ambient
Supply current
ns (MAX.)
voltage
temperature
At operating At standby At data retention
5
µPD442012A-BBxxX
50 ^{Note 1}, 55, 70, 85
V
2.7 to 3.6
°C
−25 to +85
mA (MAX.)
30 ^{Note 2}
35 ^{Note 3}
40 ^{Note 4}
µA (MAX.)
4
µA (MAX.)
2
µPD442012A-BCxxX
5
µPD442012A-DDxxX
70, 85, 100
85, 100, 120
2.2 to 3.6
1.8 to 2.2
30
15
3
5 Notes 1. VCC ≥ 3.0 V
5
2. Cycle time ≥ 70 ns
5
3. Cycle time = 55 ns
5
4. Cycle time = 50 ns
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M14671EJ7V0DS00 (7th edition)
The mark 5 shows major revised points.
Date Published July 2001 NS CP (K)
Printed in Japan
©
2000