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UPD43256B_00 Datasheet, PDF (1/24 Pages) NEC – 256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD43256B
256K-BIT CMOS STATIC RAM
32K-WORD BY 8-BIT
Description
The µPD43256B is a high speed, low power, and 262,144 bits (32,768 words by 8 bits) CMOS static RAM.
Battery backup is available. And A and B versions are wide voltage operations.
The µPD43256B is packed in 28-pin plastic DIP, 28-pin plastic SOP and 28-pin plastic TSOP (I) (8 x 13.4 mm).
Features
• 32,768 words by 8 bits organization
• Fast access time: 70, 85, 100, 120, 150 ns (MAX.)
• Low voltage operation (A version: VCC = 3.0 to 5.5 V, B version: VCC = 2.7 to 5.5 V)
• Low VCC data retention: 2.0 V (MIN.)
• /OE input for easy application
Part number
Access time
ns (MAX.)
Operating supply Operating ambient
Supply current
voltage
V
temperature
°C
At operating
mA (MAX.)
At standby At data retention
µA (MAX.) µA (MAX.) Note1
µPD43256B-xxL
70, 85
4.5 to 5.5
0 to 70
45
50
3
µPD43256B-xxLL
15
2
µPD43256B-Axx
85, 100 , Note2 120 Note2
3.0 to 5.5
µPD43256B-Bxx Note2
100, 120, 150
2.7 to 5.5
Notes 1. TA ≤ 40 °C, VCC = 3.0 V
2. Access time: 85 ns (MAX.) (VCC = 4.5 to 5.5 V)
Version X and P
This Data sheet can be applied to the version X and P. Each version is identified with its lot number. Letter X in the
fifth character position in a lot number signifies version X, letter P, version P.
D43256B
JAPAN
Lot number
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M10770EJCV0DS00 (12th edition)
The mark 5 shows major revised points.
Date Published June 2000 NS CP (K)
Printed in Japan
©
1990, 1993, 1994