UPD178002 Datasheet, PDF (1/48 Pages) NEC – 8-BIT SINGLE-CHIP MICROCONTROLLERS

DATA SHEET
MOS INTEGRATED CIRCUIT
µ PD178002, 178003
8-BIT SINGLE-CHIP MICROCONTROLLERS
The µPD178002 and 178003 are 8-bit single-chip CMOS microcontrollers that incorporate hardware for digital
tuning systems.
The CPU uses the 78K/0 architecture, which makes it easy to implement high-speed access to internal memory
and control of peripheral hardware. Also, the instructions used are the high-speed 78K/0 instructions, suitable for
system control.
The peripheral hardware includes an input/output port, 8-bit timer, A/D converter, serial interface, power-on-clear
circuits, as well as a pre-scaler for digital tuning, a PLL frequency synthesizer, and a frequency counter.
The µPD178P018A, one-time PROM or EPROM versions that can be operated in the same supply voltage range
as for the mask ROM versions, and various development tools, are also available.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
µPD178003 Subseries User’s Manual:
U13033E
78K/0 Series User’s Manual — Instructions: U12326E
FEATURES
• Program memory (ROM) capacity
µPD178002: 16 Kbytes
µPD178003: 24 Kbytes
• Data memory (RAM) capacity: 512 bytes
• Instruction cycle: 0.44 µs (4.5 MHz crystal resonator used)
• Selected peripheral hardware of the µPD178018A Subseries
General-purpose I/O ports, A/D converter, serial interface, timer, frequency counter, power-on-clear circuits.
• On-chip hardware for a PLL frequency synthesizer.
Dual modulus pre-scaler, programmable divider, phase comparator, charge pump.
• Vector interrupt sources: 8
• Supply Voltage: VDD = 4.5 to 5.5 V (during PLL operation)
VDD = 3.5 to 5.5 V (during CPU operation, when the system clock is fX/2 or lower)
VDD = 4.5 to 5.5 V (during CPU operation, when the system clock is fX)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U12628EJ3V0DS00 (3rd edition)
The mark shows major revised points.
Date Published December 1999 N CP(K)
Printed in Japan
©
1997, 1999