UPC8125GR_99 Datasheet, PDF (1/15 Pages) NEC – SILICON MMIC UPCONVERTER WITH AGC + IQ MODULATOR

SILICON MMIC UPCONVERTER
WITH AGC + IQ MODULATOR
UPC8125GR
FEATURES
• WIDE SUPPLY VOLTAGE RANGE: 2.7 to 5.5 V
• OUTPUT FREQUENCY RANGE: 1.8 to 2.0 GHz
• INTERNAL LPF TO REJECT LO & SPURIOUS
LEAKAGE
• PORTS FOR EXTERNAL IF FILTER
• AGC FUNCTION: 40 dB RANGE
• POWER SAVE FUNCTION
• SMALL 20 PIN SSOP PACKAGE
• TAPE AND REEL PACKAGING AVAILABLE
DESCRIPTION
The UPC8125GR is a Silicon MMIC manufactured with the
NESAT^TM III silicon bipolar process. The IC consists of a 1.8 -
2.0 GHz upconverter with AGC function and a 220 - 270 MHz IQ
modulator. The device operates over a wide 2.7 - 5.5 V supply
voltage range and features a power save function. The device
INTERNAL BLOCK DIAGRAM
Vcc (MOD) ₁
Filter 1 2
Filter 2 3
I4
–
I
5
Q6
–
Q
7
Lo1 in 8
x2
Lo1 in ⁹
GND 10
Reg.
LPF LPF
90 deg. Phase
Shifter (÷ 2)
Reg.
20 Vcc (Up-con)
19 RFout
18 GND
17 GND
16 Vps
15 VAGC
14 GND
13 Lo2 in
12 Lo2 in
11 GND
was specifically designed for digital mobile communication
applications such as 1900 MHz PCS and PHS handsets.
NEC's stringent quality assurance and test procedures ensure
the highest reliability and performance.
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = VPS = 3.0 V, unless otherwise specified)
SYMBOLS
ICC
PART NUMBER
PACKAGE OUTLINE
PARAMETERS AND CONDITIONS
Total Circuit Current (no input signal)
UNITS
mA
UPC8125GR
S20 (SSOP 20)
MIN
TYP
MAX
30
36
48
ICC(PS) Total Circuit Current at Sleep Mode
VPS ≤ 0.5 V (Low)
µA
0.3
10
PRFout 1 Total Output Power 1
VAGC = 3.0 V
dBm
-13
-9
-5
PRFout 2 Total Output Power 2
VAGC = 0.5 V
dBm
-50
LOL
Lo Carrier Leak¹
fLO1 + fLO2
dBc
-37
-30
ImR
Image Rejection (Side Band leak)¹
dBc
-35
-30
IM3 I/Q I/Q 3rd Order Intermodulation Distortion¹
dBc
-50
-30
GCR
AGC Amp. Gain control range
VAGC = 2.5 V to 0 V
dB
28
40
TPS(RISE) Power Save Rise Time
VPS (OFF) → VPS (ON)
µS
2
5
TPS (FALL) Power Save Fall Time
VPS (ON) → VPS (OFF)
µS
5
10
ZI/Q
Input Impedance I and Q Ports
fI/Q = 24 kHZ, I → I, Q → Q
kΩ
200
II/Q
I/Q Bias Current
I → I, Q → Q
µA
5
ZLO1
Lo1 Input VSWR
fLO1= 220 MHz to 270 MHz
1.2:1
EVM
Error Vector Magnitude
MOD Pattern : PN9
%rms
2.5
4.5
Padj
Adjacent Channel Power
∆f = 600 KHZ
dBc
MOD Pattern : PN9
-68
-60
Notes:
1. VI/Q = 1.5 V (DC) +0.5 Vp-p (AC)
California Eastern Laboratories