UPC1862 Datasheet, PDF (1/32 Pages) NEC – BURST LOCK CLOCK GENERATOR

DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC1862
BURST LOCK CLOCK GENERATOR
The µPC1862 is an LSI incorporating a PLL circuit to generate nfSC clocks (fSC: color subcarrier frequency), ideal
for the processing of digital video signals as in extended definition television (EDTV) systems.
FEATURES
• VCO is incorporated.
• Horizontal and vertical sync separation circuits are incorporated (with output pins).
• Horizontal and vertical sync output pulses (TTL level)
• ACC amplifier and killer detector circuits are incorporated.
• 1/4 and 1/8 (1/2 × 1/4) frequency dividers are incorporated.
• fSC phase control circuits is incorporated.
• Applicable to both NTSC and PAL systems.
• Possible to input burst gate pulse from external
ORDERING INFORMATION
Part number
µPC1862GS
Package
36-pin plastic shrink SOP (300 mil)
The information in this document is subject to change without notice.
Document No. S11431EJ3V0DS00 (3rd edition)
Date Published December 1997 N CP(K)
The mark shows major revised points.
Printed in Japan
©
1991, 1996