UPA836TC Datasheet, PDF (1/2 Pages) NEC – NPN SILICON EPITAXIAL TWIN TRANSISTOR

PRELIMINARY DATA SHEET
NPN SILICON EPITAXIAL TWIN TRANSISTOR UPA836TC
FEATURES
• SMALL PACKAGE OUTLINE:
1.5 mm x 1.1 mm, 33% smaller than conventional
SOT-363 package
• LOW HEIGHT PROFILE:
Just 0.55 mm high
• FLAT LEAD STYLE:
Reduced lead inductance improves electrical
performance
• TWO DIFFERENT DIE TYPES:
Q1 - Ideal oscillator transistor
Q2 - Ideal buffer amplifier transistor
DESCRIPTION
The UPA836TC contains one NE685 and one NE688 NPN
high frequency silicon bipolar chip. NEC's new ultra small TC
package is ideal for all portable wireless applications where
reducing board space is a prime consideration. Each transistor
chip is independently mounted and easily configured for oscil-
lator/buffer amplifier and other applications.
OUTLINE DIMENSIONS (Units in mm)
Package Outline TC
(TOP VIEW)
1.50±0.1
1.50±0.1
0.48
0.96
0.48
1.10±0.1
1
2
3
0.20
+0.1
-0.05
PIN OUT
6
1. Collector (Q1)
2. Emitter (Q1)
5
3. Collector (Q2)
4. Base (Q2)
5. Emitter (Q2)
4
6. Base (Q1)
0.55±0.05
0.11^+0.1
-0.05
Note: Pin 1 is the lower left most pin
as the package lettering is oriented
and read left to right.
ELECTRICAL CHARACTERISTICS (TA = 25°C)
PART NUMBER
PACKAGE OUTLINE
UPA836TC
TC
SYMBOLS
PARAMETERS AND CONDITIONS
UNITS
MIN
ICBO
Collector Cutoff Current at VCB = 5 V, IE = 0
µA
IEBO
Emitter Cutoff Current at VEB = 1 V, IC = 0
µA
hFE
DC Current Gain¹ at VCE = 3 V, IC = 10 mA
75
fT
Gain Bandwidth at VCE = 3 V, IC = 10 mA, f = 2 GHz
GHz
10
Cre
Feedback Capacitance² at VCB = 3 V, IE = 0, f = 1 MHz
pF
|S21E|² Insertion Power Gain at VCE = 3 V, IC =10 mA, f = 2 GHz
dB
7
NF
Noise Figure at VCE = 3 V, IC = 3 mA, f = 2 GHz
dB
ICBO
Collector Cutoff Current at VCB = 5 V, IE = 0
µA
IEBO
Emitter Cutoff Current at VEB = 1 V, IC = 0
µA
hFE
DC Current Gain¹ at VCE = 1 V, IC = 3 mA
80
fT
Gain Bandwidth (1) at VCE = 1 V, IC = 3 mA, f = 2 GHz
GHz
4.0
fT
Gain Bandwidth (2) at VCE = 3 V, IC = 20 mA, f = 2 GHz
GHz
Cre
Feedback Capacitance² at VCB = 1 V, IE = 0, f = 1 MHz
pF
|S21E|² Insertion Power Gain (1) at VCE = 1 V, IC =3 mA, f = 2 GHz
dB
2.5
|S21E|² Insertion Power Gain (2) at VCE = 3 V, IC =20 mA, f = 2 GHz
dB
TYP
12
0.4
8.5
1.5
4.5
9.0
0.75
3.5
6.5
MAX
0.1
0.1
150
0.7
2.5
0.1
0.1
160
0.85
NF
Noise Figure (1) at VCE = 1 V, IC = 3 mA, f = 2 GHz
dB
1.7
2.5
NF
Noise Figure (2) at VCE = 3 V, IC = 7 mA, f = 2 GHz
dB
1.5
Notes: 1. Pulsed measurement, pulse width ≤ 350 µs, duty cycle ≤ 2 %.
2. Collector to base capacitance when measured with capacitance meter (automatic balanced bridge method), with emitter connected to
guard pin of capacitances meter.
California Eastern Laboratories