UPA2751GR Datasheet, PDF (1/12 Pages) NEC – SWITCHING N-CHANNEL POWER MOSFET

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA2751GR
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The µPA2751GR is asymmetrical dual N-Channel MOS
Field Effect Transistor designed for DC/DC converters of
notebook computers and so on.
FEATURES
• Asymmetric dual chip type
• Low on-state resistance, Low Ciss
CH1: RDS(on)2: 21.0 mΩ MAX. (VGS = 4.5 V, ID = 4.5 A)
Ciss = 1040 pF TYP. (VDS = 10 V, VGS = 0 V)
CH2: RDS(on)2: 35.0 mΩ MAX. (VGS = 4.5 V, ID = 4.0 A)
Ciss = 480 pF TYP. (VDS = 10 V, VGS = 0 V)
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
µPA2751GR
PACKAGE
Power SOP8
PACKAGE DRAWING (Unit: mm)
8
5
CH2 CH1
1
4
5.37 Max.
CH2 ^{1 ; Source 1}
2 ; Gate 1
7, 8 ; Drain 1
CH1 3 ; Source 2
4 ; Gate 2
5, 6 ; Drain 2
6.0 ±0.3
4.4
0.8
1.27 0.78 Max.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
CH1/CH2 VDSS
30
V
Gate to Source Voltage (VDS = 0 V)
CH1/CH2 VGSS
±20
V
Drain Current (DC)
CH1
ID(DC)
±9.0
A
Drain Current (pulse) ^Note1
CH2
ID(DC)
±8.0
A
CH1
ID(pulse)
±36
A
Total Power Dissipation (1 unit) ^Note2
Total Power Dissipation (2 unit) ^Note2
CH2
ID(pulse)
±32
A
CH1/CH2 PT
1.7
W
CH1/CH2 PT
2.0
W
Channel Temperature
CH1/CH2 Tch
150
°C
Storage Temperature
Single Avalanche Current ^Note3
Single Avalanche Energy ^Note3
Single Avalanche Current ^Note3
Single Avalanche Energy ^Note3
CH1/CH2 Tstg –55 to + 150 °C
CH1
IAS
9.0
A
CH1
EAS
8.1
mJ
CH2
IAS
8.0
A
CH2
EAS
6.4
mJ
EQUIVALENT CIRCUIT
(1/2 circuit)
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1%
2. TA = 25°C, Mounted on ceramic substrate of 2000 mm² x 1.6 mm
3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this
device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage
may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G15781EJ1V0DS00 (1st edition)
Date Published March 2002 NS CP(K)
Printed in Japan
©
2001