UPA1772 Datasheet, PDF (1/6 Pages) NEC – SWITCHING P-CHANNEL POWER MOSFET

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1772
SWITCHING
P-CHANNEL POWER MOS FET
DESCRIPTION
The µPA1772 is Dual P-Channel MOS Field Effect
Transistor designed for power management applications
of portable machines.
FEATURES
• Dual chip type
• Low on-state resistance
RDS(on)1 = 20.0 mΩ MAX. (VGS = −10 V, ID = −4 A)
RDS(on)2 = 29.5 mΩ MAX. (VGS = −4.5 V, ID = −4 A)
RDS(on)3 = 34.0 mΩ MAX. (VGS = −4.0 V, ID = −4 A)
• Low Ciss: Ciss = 1500 pF TYP. (VDS = −10 V, VGS = 0 V)
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
µPA1772G
PACKAGE
Power SOP8
PACKAGE DRAWING (Unit : mm)
8
5
1 : Source 1
2 : Gate 1
7, 8 : Drain 1
3 : Source 2
4 : Gate 2
5, 6 : Drain 2
1
4
5.37 MAX.
6.0 ±0.3
4.4
0.8
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
−30
V
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (pulse) ^Note1
Total Power Dissipation (2 unit) ^Note2
Total Power Dissipation (1 unit) ^Note2
VGSS
m20
V
ID(DC)
m8
A
ID(pulse)
m32
A
PT
2.0
W
PT
1.7
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg –55 to + 150 °C
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1%
2. TA = 25°C, Mounted on ceramic substrate of 2000 mm² x 2.2 mm
EQUIVALENT CIRCUIT
(1/2 circuit)
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device..
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G15830EJ1V0DS00 (1st edition)
Date Published January 2003 NS CP(K)
Printed in Japan
2001, 2003