UPA1760 Datasheet, PDF (1/8 Pages) NEC – SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ^PA1760
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The µPA1760 is N-Channel MOS Field Effect Transistor
designed for DC/DC Converters and power management
application of notebook computers.
FEATURES
• Dual Chip Type
• Low On-Resistance
5 RDS(on)1 = 26.0 mΩ MAX. (VGS = 10 V, ID = 4.0 A)
5 RDS(on)2 = 36.0 mΩ MAX. (VGS = 4.5 V, ID = 4.0 A)
5 RDS(on)3 = 42.0 mΩ MAX. (VGS = 4.0 V, ID = 4.0 A)
• Low Ciss : Ciss = 760 pF TYP.
• Built-in G-S Protection Diode
• Small and Surface Mount Package (Power SOP8)
PACKAGE DRAWING (Unit : mm)
8
5
1
4
5.37 Max.
1
; Source1
2
; Gate1
7, 8
; Drain1
3
; Source2
4
; Gate2
5, 6
; Drain2
6.0 ±0.3
4.4
0.8
1.27 0.78 Max.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
30
V
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (Pulse) ^Note1
Total Power Dissipation (1 unit) ^Note2
Total Power Dissipation (2 unit) ^Note2
VGSS
±20
V
ID(DC)
±8.0
A
ID(pulse)
±32
A
PT
1.7
W
PT
2.0
W
EQUIVALENT CIRCUIT
(1/2 Circuit)
Drain
Channel Temperature
Storage Temperature
5 Single Avalanche Current ^Note3
5 Single Avalanche Energy ^Note3
Tch
150
°C
Tstg –55 to + 150 °C
IAS
8
A
EAS
6.4
mJ
Gate
Body
Diode
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1 %
5
2. TA = 25 °C, Mounted on ceramic substrate of 2000 mm² x 1.6 mm
5
3. Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V → 0 V
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
Exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G13891EJ1V0DS00 (1st edition)
Date Published November 1999 NS CP(K)
The mark 5 shows major revised points.
©
Printed in Japan
1998,1999