UPA103 Datasheet, PDF (1/8 Pages) NEC – HIGH FREQUENCY NPN TRANSISTOR ARRAY

DATA SHEET
COMPOUND TRANSISTOR
µPA103
HIGH FREQUENCY NPN TRANSISTOR ARRAY
FEATURES
• FIVE MONOLITHIC 9 GHz fT TRANSISTORS:
Two of these use a common emitter pin and can be used as differential amplifiers
• OUTSTANDING hFE LINEARITY
• TWO PACKAGE OPTIONS:
µPA103B: Superior thermal dissipation due to studded ceramic package
µPA103G: Reduced circuit size due to 14-pin plastic SOP package for surface mounting
DESCRIPTION AND APPLICATIONS
The µPA103 is a user configurable Silicon bipolar transistor array consisting of a common emitter pair and three
individual bipolar transistors. It is available in a surface mount 14-pin plastic SOP package and a 14-pin ceramic package.
Typical applications include: differential amplifiers and oscillators, high speed comparators, advanced cellular phone
systems, electro-optic and other signal processing up to 1.5 gigabits/second.
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA103B-E1
14-pin ceramic package
µPA103G-E1
14-pin plastic SOP (225 mil)
ABSOLUTE MAXIMUM RATINGS (TA = +25 °C)
SYMBOLS
PARAMETERS
UNITS RATINGS
VCBO*
Collector to Base Voltage V
15
VCEO*
Collector to Emitter Voltage
V
6
VEBO*
Emitter to Base Voltage
V
2.5
IC*
Collector Current
mA
40
PT
Power Dissipation
µPA103B mW
650
µPA103G mW
350
TJ
Junction Temperature
µPA103B °C
200
µPA103G °C
125
TSTG
Storage Temperature
µPA103B °C –55 to +200
µPA103G °C –55 to +125
* Absolute maximum ratings for each transistor.
Caution electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. P10708EJ2V0DS00 (2nd edition)
Date Published October 1999 N CP(K)
The mark shows major revised points.
Printed in Japan
©
1995, 1999