UPA102 Datasheet, PDF (1/8 Pages) NEC – HIGH FREQUENCY NPN TRANSISTOR ARRAY

DATA SHEET
COMPOUND TRANSISTOR
µPA102
HIGH FREQUENCY NPN TRANSISTOR ARRAY
FEATURES
• TWO BUILT-IN DIFFERENTIAL AMPLIFIER CIRCUITS: (Each Transistor has fT 9 GHz)
• OUTSTANDING hFE LINEARITY
• TWO PACKAGE OPTIONS:
µPA102B: Superior thermal dissipation due to studded 14-pin ceramic package
µPA102G: Reduced circuit size due to 14-pin plastic SOP package for surface mounting
DESCRIPTION AND APPLICATIONS
The µPA102 is a user configurable Silicon bipolar transistor array consisting of two separate differential amplifiers.
It is available in a surface mount (14-pin plastic SOP) package and a 14-pin ceramic package. Typical applications
include: pulse pattern generators, oscillators, differential amps, high speed comparators, electro-optic signal
processing up to 1 Gigabits/second, and advanced cellular phone systems.
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA102B-E1
14-pin ceramic package
µPA102G-E1
14-pin plastic SOP (225 mil)
ABSOLUTE MAXIMUM RATINGS (TA = +25 °C)
SYMBOLS
PARAMETERS
UNITS RATINGS
VCBO*
Collector to Base Voltage
V
15
VCEO*
Collector to Emitter Voltage
V
6
VEBO*
Emitter to Base Voltage
V
2.5
IC*
Collector Current
mA
40
PT
Power Dissipation
µPA102B mW
650
µPA102G mW
350
TJ
Junction Temperature
µPA102B °C
200
µPA102G °C
125
TSTG
Storage Temperature
µPA102B °C –55 to +200
µPA102G °C –55 to +125
* Absolute maximum ratings for each transistor.
Caution electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. P10707EJ2V0DS00 (2nd edition)
The mark shows major revised points.
Date Published October 1999 N CP(K)
Printed in Japan
©
1995,1999