UPA101 Datasheet, PDF (1/8 Pages) NEC – HIGH FREQUENCY NPN TRANSISTOR ARRAY

DATA SHEET
COMPOUND TRANSISTOR
µPA101
HIGH FREQUENCY NPN TRANSISTOR ARRAY
FEATURES
• BUILT-IN ULTRAHIGH FREQUENCY MULTIPLIER: (Each Transistor has fT 9 GHz)
• OUTSTANDING hFE LINEARITY
• TWO PACKAGE OPTIONS:
µPA101B: Superior thermal dissipation due to studded 14-pin ceramic package
µPA101G: Reduced circuit size due to 8-pin plastic SOP package for surface mounting
DESCRIPTION AND APPLICATIONS
This Si bipolar transistor array contains six bipolar transistors which have fT 9 GHz. Applications include a multiplier,
double balanced mixer, phase detector, or AGC circuit. The two package options offer a choice of excellent heat
dissipation or 35 % size reduction.
ORDERING INFORMATION
PART NUMBER
PACKAGE
µPA101B-E1
14-pin ceramic package
µPA101G-E1
8-pin plastic SOP (225 mil)
ABSOLUTE MAXIMUM RATINGS (TA = +25 °C)
SYMBOLS
PARAMETERS
UNITS RATINGS
VCBO*
Collector to Base Voltage V
15
VCEO*
Collector to Emitter Voltage
V
6
VEBO*
Emitter to Base Voltage
V
2.5
IC*
Collector Current
mA
40
PT
Power Dissipation
µPA101B mW
650
µPA101G mW
250
TJ
Junction Temperature
µPA101B °C
200
µPA101G °C
125
TSTG
Storage Temperature
µPA101B °C –55 to +200
µPA101G °C –55 to +125
* Absolute maximum ratings for each transistor.
Caution electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. P10706EJ2V0DS00 (2nd edition)
The mark shows major revised points.
Date Published October 1999 N CP(K)
Printed in Japan
©
1995, 1999