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AN1L3N Datasheet, PDF (1/4 Pages) NEC – on-chip resistor PNP silicon epitaxial transistor | |||
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DATA SHEET
COMPOUND TRANSISTOR
AN1L3N
on-chip resistor PNP silicon epitaxial transistor
For mid-speed switching
FEATURES
⢠On-chip bias resistor
(R1 = 4.7 kâ¦, R2 = 10 kâ¦)
⢠Complementary transistor with AA1L3N
PACKAGE DRAWING (UNIT: mm)
ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
Parameter
Symbol
Ratings
Unit
Collector to base voltage
VCBO
â60
V
Collector to emitter voltage
VCEO
â50
V
Emitter to base voltage
VEBO
â5
V
Collector current (DC)
IC(DC)
â100
mA
Collector current (Pulse)
IC(pulse) *
â200
mA
Total power dissipation
PT
250
mW
Junction temperature
Tj
150
°C
Storage temperature
Tstg
â55 to +150
°C
* PW ⤠10 ms, duty cycle ⤠50 %
ELECTRICAL CHARACTERISTICS (Ta = 25°C)
Parameter
Symbol
Collector cutoff current
ICBO
DC current gain
hFE1 **
DC current gain
hFE2 **
Collector saturation voltage VCE(sat) **
Low level input voltage
VIL **
High level input voltage
VIH **
Input resistance
R1
E-to-B resistance
R2
Turn-on time
ton
Storage time
tstg
Turn-off time
toff
** PW ⤠350 µs, duty cycle ⤠2 %
Conditions
VCB = â50 V, IE = 0
VCE = â5.0 V, IC = â5.0 mA
VCE = â5.0 V, IC = â50 mA
IC = â5.0 mA, IB = â0.25 mA
VCE = â5.0 V, IC = â100 µA
VCE = â0.2 V, IC = â5.0 mA
VCC = â5 V, RL = 1 kâ¦
VI = â5 V, PW = 2 µs
duty cycleâ¤2 %
MIN.
TYP.
MAX.
Unit
â100
nA
35
60
100
â
80
200
â
â0.04
â0.2
V
â0.9
â0.6
V
â3.0
â1.5
V
3.29
4.7
6.11
kâ¦
7
10
13
kâ¦
0.2
µs
5.0
µs
6.0
µs
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D16169EJ1V0DS00 (1st edition)
Date Published April 2002 N CP(K)
©
Printed in Japan
21090928
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