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OP4008B Datasheet, PDF (1/6 Pages) RF Monolithics, Inc – Quartz SAW Stabilized and Filtered “Diff Sine” Technology
• Quartz SAW Stabilized and Filtered “Diff Sine” Technology
• Fundamental-Mode Oscillation at 669.327 MHz
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• Voltage Tunable for Phase Lock Loop Operations
• Optical Timing Reference for Forward Error Correction Applications
• Complies with Directive 2002/95/EC (RoHS)
The output of this device is generated and filtered by narrow-band quartz SAW elements at 669.327 MHz.
The configuration of this clock provides a pure signal for optical timing applications in noisy signal
environments. The Q/Q differential output swing of ±1 volt about 0 Vdc has symmetry better than ±1% into
loads from 40 to 70 ohms, determined by customer application. The long term frequency accuracy is set by
an external reference source allowing this device to complete a Phase Lock Loop design without the usual
noise and jitter problems associated with PLL’s.
Absolute Maximum Ratings
Rating
DC Suppy Voltage
Tuning Voltage
Case Temperature
Value
0 to 5.5
0 to 5.5
-55 to 100
Units
Vdc
Vdc
°C
OP4008B
669.327 MHz
Optical
Timing Clock
SMC-08
Electrical Characteristics
Characteristic
Operating Frequency Absolute Frequency
Tuning Range
Tuning Voltage
Tuning Linearity
Tuning Sensitivity
Modulation Bandwidth
Q and Q Output
Voltage into 50 Ω (VSWR<1.2)
Operating Load VSWR
Symmetry
Harmonic Spurious
Nonharmonic Spurious
Phase Noise
@100 Hz offset
@ 1 kHz offset
@ 10 kHz offset
Noise Floor
Q and Q Jitter
RMS Jitter
No Noise on VCC
with 200 mVP-P noise added from 1 MHz to ½ fO
Output DC Resistance (between Q & Q)
DC Power Supply
Operating Voltage
Operating Current
Operating Case Temperature
Lid Symbolization (YY=Year, WW=Week)
Sym
fO
df/dv
VO
VCC
ICC
TC
Notes
1, 9
2
1
1, 8
2,10
1,3
1,3
3, 4, 5
3, 4, 6
3, 4, 6, 7
3, 4, 6, 7
3, 4, 6, 7
3
1, 3
1, 3
1, 3
1, 3
Minimum
±100
0
140
125
0.60
49
Typical
669.327
±3
265
-75
-105
-125
-155
2
12
12
50
3.13
3.3, 5.0
-40
RFM OP4008B YYWW
Maximum
+3
±5
300
1.1
2:1
51
-30
-60
5.25
70
+85
Units
MHz
ppm
V
%
ppm/V
kHz
VP-P
%
dBc
dBc
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
psP-P
psP-P
psP-P
KΩ
Vdc
mA
°C
CAUTION: Electrostatic Sensitive Device. Observe precautions for handling.
COCOM CAUTION: Approval by the U.S. Department of Commerce is required prior to export of this device.
Notes:
1. Unless otherwise noted, all specifications include any combination of load VSWR, Vcc, and temperature, with Q and Q terminated into 50 ohm loads to
ground (see typical test circuit).
2. Useful tuning range is in excess of what is required over temp, aging, pushing, pulling & accuracy.
3. The design, manufacturing process, and specifications of this device are subject to change without notice.
4. Only under the nominal conditions of 50 Ω load impedance with VSWR ≤ 1.2 and nominal power supply voltage.
5. Symmetry is defined as the pulse width (in percent of total period) measured at the 50% points of Q or Q (see timing definitions).
6. Jitter and other spurious outputs induced by externally generated electrical noise on VCC or mechanical vibration are not included in this specification, except
where noted. External voltage regulation and careful PCB layout are recommended for optimum performance.
7. Applies to period jitter of Q and Q. Measurements are made with the Tektronix CSA803 signal analyzer with at least 1000 samples.
8. Linearity is a function of the percentage variation from a permitted linear deviation versus the amount of frequency tune range (see linearity definition).
9. One or more of the following United States patents apply: 4,616,197; 4,670,681; 4,760,352.
10. Over the range of 669.327 MHz ±25 ppm and the conditions of Note 1.
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©2008-2010 by RF Monolithics, Inc.
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OP4008B - 2/8/10