HDAS524-528 Datasheet, PDF (1/5 Pages) Murata Manufacturing Co., Ltd. – 12-Bit, 400kHz, Complete Data Acquisition System

FEATURES
12-Bit resolution, 400kHz throughput
8 Channels single-ended or 4 channels
differential
Miniature, 40-pin, ceramic DDIP
Full scale input range from 100mV to 10V
Three-state outputs
No missing codes
GENERAL DESCRIPTION
The HDAS-524 and HDAS-528 are complete data acquisition systems. Each
contains an internal multiplexer, instrumentation amplifier, sample-hold,
analog-to-digital converter and three-state outputs. Packaged in miniature,
40-pin, double-dip packages, the HDAS-524/528 have a low power dissipation
of 2.6 Watts.
The HDAS-524 provides 4 differential inputs, and the HDAS-528 provides
8 single-ended inputs. An internal instrumenta- tion amplifier is characterized
for gains of 1, 2, 4, 8, 10 and 100. The gain range is selectable through a
single external resistor.
HDAS-524/528 OPERATION
The HDAS devices accept either 8 single-ended or 4 differential input signals.
Tie unused channels to SIGNAL GROUND, pin 14. Channel selection is
accomplished using the multiplexer address pins as shown in Table 1. Obtain
additional channels by connecting external multiplexers.
The acquisition time is the amount of time the multiplexer, instrumentation
amplifier and sample-hold require to settle within a specified range of accu-
racy. The acquisition time can be measured by how long EOC is low before
the rising edge of the START CONVERT pulse for continuous operation. Higher
Continued on page 3
HDAS-524, HDAS-528
12-Bit, 400kHz, Complete
Data Acquisition System
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION
PIN FUNCTION
1 CH0/CH0 HI
2 CH1/CH1 HI
3 CH2/CH2 HI
4 CH3/CH3 HI
5 CH7/CH3 LO
6 CH6/CH2 LO
7 CH5/CH1 LO
8 CH4/CH0 LO
9 COMP BIN
10 RGAIN LO
11 RGAIN HI
12 S/H OUT
13 +10V REFERENCE OUT
14 SIGNAL GROUND
15 GAIN ADJUST
16 OFFSET ADJUST
17 BIPOLAR
18 –15V SUPPLY
19 ANALOG GROUND
20 +15V SUPPLY
40 START CONVERT
39 CA2
38 CA1
37 CA0
36 +5V SUPPLY
35 DIGITAL GROUND
34 ENABLE
33 BIT 1 (MSB)
32 BIT 2
31 BIT 3
30 BIT 4
29 BIT 5
28 BIT 6
27 BIT 7
26 BIT 8
25 BIT 9
24 BIT 10
23 BIT 11
22 BIT 12 (LSB)
21 EOC
11 10
12 15 17 16
CH0/CH0 HI 1
CH1/CH1 HI 2
CH2/CH2 HI 3
2 x 4:1
HDAS-524
CH3/CH3 HI 4
CH4/CH0 LO 8
MUX
(524)
I/A
S/H
CH5/CH1 LO 7
CH6/CH2 LO 6
8:1
HDAS-528
(528)
CH7/CH3 LO 5
12-BIT
A/D
3 STATE
OUTPUT
SIGNAL GROUND 14
33 BIT 1 (MSB)
32 BIT 2
31 BIT 3
30 BIT 4
29 BIT 5
28 BIT 6
27 BIT 7
26 BIT 8
25 BIT 9
24 BIT 10
23 BIT 11
22 BIT 12 (LSB)
39 38 37 19 35 36 20 18 13
40
21
9
34
Figure 1. Functional Block Diagram
www.murata-ps.com
Typical topology is shown.
Technical enquiries email: [e-mail], tel: [phone]
MDC_HDAS-524/528.B01 Page 1 of 5