|
ADSQ-1410 Datasheet, PDF (1/11 Pages) Murata Power Solutions Inc. – Quad 14-Bit, 10 MSPS Sampling A/D Converter | |||
|
www.murata-ps.com
PRELIMINARY
ADSQ-1410
Quad 14-Bit, 10 MSPS Sampling A/D Converter
PRODUCT OVERVIEW
The ADSQ-1410 is a quad 10MSPS sampling
A/D optimized for applications where low noise
performance and the ability to convert full-scale
step input signals at a 10 MHz conversion rate are
required. With excellent dynamic performance up
to Nyquist frequencies, the ADSQ-1410 is also an
ideal choice for multi-channel, frequency domain
applications.
This functionally complete quad A/D uses a single
rising edge triggered Start Convert signal to control
the conversion cycles of all four A/Dâs. The digital
CMOS outputs are multiplexed into pairs providing
two parallel, 3-state output buses. Four indepen-
dent Enable Control pins offer individual output
data and overï¬ow/underï¬ow selection.
A 2.5V precision internal reference, along with indi-
vidual analog input range selection pins, provides
ideal tracking over temperature while allowing
each channel to be independently conï¬gured for an
analog input range of ±1V to ±2.5V.
Available in both surface-mount and through-hole
packages, the ADSQ-1410 requires only ±5V for
internal analog supplies and 2V to 5V supply for logic
outputs. Typical power dissipation is 2.7 Watts.
Common applications include medical imaging,
radar, sonar, communications and instrumentation.
FEATURES
 Quad 14-bit resolution; 10 MSPS sampling rate
 Individual channel selectable ±1V to ±2.5V input
range
 Individual channel offset and gain adjustment
capabilities
 Functionally complete; low cost
 Low noise: 0.5 LSB RMS; no missing codes
 Excellent dynamic performance: SNR 80db
 2V to 5V CMOS logic outputs with overï¬ow/
underï¬ow; 3-latency delays
 Rising edge-triggered; Individual channel enable
/ Hi-z outputs
 ±5V and +2VDD to +5VDD logic output supplies
 66-pin SMT or TDIP package
 Developed for image processing applications
 Ideal for both time and frequency domain
applications
FUNCTIONAL BLOCK DIAGRAM
+5V 4, 10, 25, 30
Offset Adj A 3
Input A 1
SGND A 2
Range A 13
-5V 5, 11
+VDD 19, 22
Sub-Ranging A/D
A
3-State Register
52 EN A
Offset Adj B 31
Input B 33
SGND B 32
Range B 17
Sub-Ranging A/D
B
3-State Register
Offset Adj C 9
Input C 7
SGND C 8
Range C 15
Sub-Ranging A/D
C
3-State Register
Offset Adj D 26
Input D 28
SGND D 27
Range D 16
Sub-Ranging A/D
D
3-State Register
Timing and Control
+2.5V REF 14
2.5V REF
AGND 6, 12, 24, 29
OGND 18, 23
48 EN B
51 EN C
49 EN D
50 START CONV
20 Overï¬ow_AB
66 B1 (MSB) AB
65 B2 AB
64 B3 AB
63 B4 AB
62 B5 AB
61 B6 AB
60 B7 AB
59 B8 AB
58 B9 AB
57 B10 AB
56 B11 AB
55 B12 AB
54 B13 AB
53 B14 (LSB) AB
21 Overï¬ow_CD
47 B1 (MSB) CD
46 B2 CD
45 B3 CD
44 B4 CD
43 B5 CD
42 B6 CD
41 B7 CD
40 B8 CD
39 B9 CD
38 B10 CD
37 B11 CD
36 B12 CD
35 B13 CD
34 B14 (LSB) CD
Ḥ
For full details go to
www.murata-ps.com/rohs
www.murata-ps.com
Technical enquiries email: data.acquisition@murata-ps.com, tel: +1 508 339 3000
MDA_ADSQ.B01 Page 1 of 11
|
▷ |