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MSK5061RH Datasheet, PDF (5/11 Pages) M.S. Kennedy Corporation – RAD HARD LOW VOLTAGE 10A SWITCHING REGULATOR WITH CURRENT SHARE
APPLICATION NOTES CONT’D
PIN FUNCTIONS
ISHEN – The ISHEN pin enables the current sharing fea-
ture. Connect to VIN to enable current sharing functions.
Connect to PGND to disable the current sharing features.
ISHSL – The ISHSL pin configures the MSK5061RH as ei-
ther a current share master or slave. Connect to PGND to
configure the device as a master or if current sharing func-
tions are not implemented. Connect to VIN to configure the
MSK5061RH as a current share slave device.
ISHCOM – ISHCOM is a bidirectional communication line
between a current share Master and a current share Slave.
If using current share, tie ISHCOM of the Master to ISH-
COM of the Slave. The Master enables the Slave by resis-
tively (~ 8.5kΩ) pulling ISHCOM high. The Slave indicates
an over-current fault condition to the Master by pulling ISH-
COM low. To mitigate SET, connect a 47pF ceramic capac-
itor from ISHCOM to the PWB ground plane. If not using
current share this pin should be floated or connected to the
PCB ground plane. ISHCOM is tri-stated if ISHEN is low.
ISHREFA, B, C - If configured as a current share Master
the ISHREFA/ISHREFB/ISHREFC pins provide a refer-
ence output current equal to 100μA each. If configured as
a current share Slave, the ISHREFA/ISHREFB/ISHREFC
pins accept a reference input current. For a current share
Slave, this input current is used together with the ISHA/
ISHB/ISHC current to determine the Master’s redundant
A/B/C error amp output current. If using current share, tie
ISHREFA/ISHREFB/ISHREFC of the MASTER to ISHRE-
FA/ISHREFB/ISHREFC of the Slave. If not using current
share, tie ISHREFA/ISHREFB/ISHREFC to VIN. The pur-
pose of the reference current is to reduce the impact of
external noise coupling onto ISHA/ISHB/ISHC. ISHREFA/
ISHREFB/ISHREFC are tri-stated prior to a valid POR and
when ISHEN = PGND.
ISHA, B, C – If configured as a current share Master, the
ISHA/ISHB/ISHC pins are outputs that provide a current
equal to 25 times the redundant A/B/C error amp output
currents plus ISHREFA/ISHREFB/ISHREFC (nominally
100μA each). If configured as a current share Slave, the
ISHA/ISHB/ISHC pins are inputs that become the Slave’s
redundant A/B/C error amp output current. If using current
share, tie ISHA/ISHB/ISHC of the Master to ISHA/ ISHB/
ISHC of the Slave. If not using current share, tie ISHA/
ISHB/ISHC to DVDD. ISHA/ISHB/ISHC are tri-stated prior
to a valid POR and when ISHEN = PGND.
POWER SUPPLY BYPASSING
Current is drawn from the input bus in roughly trapezoidal
pulses with very fast edge rates, and consequently consists
of a broad frequency spectrum. High quality low ESR/ESL
ceramic capacitors connected directly across the VIN and
PGND pins are recommended to provide a low impedance
to the high frequency components of the wave form and
trap them local to the regulator, thereby limiting conducted
EMI. Minimizing the area of the VIN-CIN-PGND loop will
help minimize radiated EMI. The MSK5061RH simplifies
application with the inclusion of significant internal ceram-
ic capacitance. The internal and external input capacitors
source the AC component of the switched current into the
regulator. The RMS ripple current seen by the input ca-
pacitors is high, approaching a maximum of 0.5 x Iout at
approximately 50% duty cycle. Sufficient bulk capacitance
must be provided to minimize ripple voltage seen by the
device and ensure stable operation. As a general rule of
thumb, VIN ripple should be less than 3 to 5% of VIN. Se-
lection of the bulk input capacitors will likely involve a par-
allel combination of several tantalum and ceramics to allow
proper voltage and ripple current derating. Satisfying those
requirements will almost invariably result in sufficient bulk
to minimize ripple voltage and ensure stable operation.
OUTPUT CAPACITOR SELECTION
When operated at 1MHz, 500uF total of low ESR capac-
itance mounted near the MSK5061RH have been shown
to provide good stability margins. However physical and
practical realities may necessitate at least some bypass
capacitance local to the load. The capacitor parasitic ESR
and ESL, the non-zero impedance between the regulator
output and the load terminals, and finite bandwidth will
cause a transient voltage signal to develop proportion-
al to the magnitude of the load step. Additional low ESR
output capacitance can help mitigate the transient voltage
excursions. Care should be exercised in capacitor selec-
tion such that the loop maintains adequate stability margin.
Additional output capacitance will be required to lower the
loop bandwidth and improve stability margins if operating at
switch frequencies below 750kHz. Adding 220µF to 330µF
is typically a sufficient adjustment for this scenario. See the
typical performance curves for addition information.
5
PRELIMINARY Rev. B 3/15