MSK3014_15 Datasheet, PDF (2/5 Pages) M.S. Kennedy Corporation – Isolated Package for Direct Heat Sinking, Excellent Thermal Conductivity

ABSOLUTE MAXIMUM RATINGS
VDSS Drain to Source Voltage ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 100V MAX
VDGDR Drain to Gate Voltage
(RGS=1MΩ) 100V MAX ○
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VGS Gate to Source Voltage
(Continuous) ±20V MAX ○
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ID
Continuous Current ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 10A MAX
IDM
Pulsed Current 25A MAX ○
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Single Pulse Avalanche Energy
(Q1,Q4) 7.9mJ ○
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(Q2,Q3) 7.9mJ ○
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TJ
JunctionTemperature ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ +175°C MAX
TST Storage Temperature ○ ○ ○ ○ ○ ○ ○ ○ -55°C to +150°C
TC Case Operating Temperature Range -55°C to +125°C
TLD Lead Temperature Range
(10 Seconds Lead Only) ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 200°C MAX
RTH-JC Thermal Resistance (Junction to Case)
P-Channel @ 25°C ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 5.2°C/W
P-Channel @ 125°C ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 8.0°C/W
N-Channel @ 25°C ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 6.0°C/W
N-Channel @ 125°C ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ 9.1°C/W
ELECTRICAL SPECIFICATIONS
Parameter
Test Conditions 4
Min.
MSK3014
Typ.
Max.
Units
Drain-Source Breakdown Voltage
VGS=0 ID=0.25mA (All Transistors)
100
-
-
V
Drain-Source Leakage Current
VDS=100V VGS=0V (Q2,Q3)
VDS=-100V VGS=0V (Q1,Q4)
-
-
25
μA
-
-
-25
μA
Gate-Source Leakage Current
VGS=±20V VDS=0 (All Transistors)
-
-
±100
nA
Gate-Source Threshold Voltage
VDS=VGS ID=250μA (Q2,Q3)
VDS=VGS ID=250μA (Q1,Q4)
2.0
-
4.0
V
2.0
-
4.0
V
Drain-Source On Resistance 2
VGS=10V ID=9.0A (Q2,Q3)
VGS=-10V ID=-8.4A (Q1,Q4)
-
-
0.20
Ω
-
-
0.28
Ω
Drain-Source On Resistance 3
VGS=10V ID=9.0A (Q2,Q3)
VGS=10V ID=-8.4A (Q1,Q4)
-
-
0.11
Ω
-
-
0.20
Ω
Forward Transconductance 1
VDS=50V ID=9.0A (Q2,Q3)
VDS=-50V ID=-8.4A (Q1,Q4)
6.4
-
3.2
-
-
S
-
S
N-Channel (Q2,Q3)
Total Gate Charge 1
Gate-Source Charge ¹
ID=9.0A
VDS=80V
-
-
44
nC
-
-
6.2
nC
Gate-Drain Charge 1
VGS=10V
-
-
21
nC
Turn-On Delay Time 1
VDD=50V
-
6.4
-
nS
Rise Time 1
ID=9.0A
-
27
-
nS
Turn-Off Delay Time 1
RG=12Ω
-
37
-
nS
Fall Time 1
RD=5.5Ω
-
25
-
nS
Input Capacitance 1
VGS=0V
-
640
-
pF
Output Capacitance 1
VDS=25V
-
160
-
pF
Reverse Transfer Capacitance 1
f=1.0MHz
-
88
-
pF
P-CHANNEL (Q1,Q3,Q5)
Total Gate Charge 1
ID=-8.4A
-
-
58
nC
Gate-Source Charge 1
VDS=-80V
-
-
8.3
nC
Gate-Drain Charge 1
VGS=-10V
-
-
32
nC
Turn-On Delay Time 1
VDD=-50V
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15
-
nS
Rise Time 1
ID=-8.4A
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58
-
nS
Turn-Off Delay Time 1
RG=9.1Ω
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45
-
nS
Fall Time 1
RD=6.2Ω
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46
-
nS
Input Capacitance 1
VGS=0V
-
760
-
pF
Output Capacitance 1
VDS=-25V
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260
-
pF
Reverse Transfer Capacitance 1
f=1.0MHz
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170
-
pF
BODY DIODE
Forward On Voltage 1
IS=9.0A VGS=0V (Q2,Q3)
IS=-8.4A VGS=0V (Q1,Q4)
-
1.3
-
V
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-1.6
-
V
Reverse Recovery Time 1
IS=9.0A di/dt=100A/μS (Q2,Q3)
IS=-8.4A di/dt=100A/μS (Q1,Q4)
-
130
190
nS
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130
190
nS
Reverse Recovery Charge 1
NOTES:
IS=9.0A di/dt=100A/μS (Q2,Q3)
IS=-8.4A di/dt=100A/μS (Q1,Q4)
-
650
970
μC
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650
970
μC
1 This parameter is guaranteed by design but need not be tested. Typical parameters are representative of actual device performance but are for reference only.
2 Resistance as seen at package pins.
3 Resistance for die only; use for thermal calculations.
4 TA=25°C unless otherwise specified.
2
Rev. D 7/10