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EV0074 Datasheet, PDF (5/5 Pages) Monolithic Power Systems – Triple Output TFT Bias Converter
TM
EV0074 (MP1530) – TRIPLE OUTPUT TFT BIAS CONVERTER
EVALUATION BOARD
QUICK START GUIDE
The three output voltages of this board are set to +13V, +27V, and –8.5V. The board layout
accommodates most commonly used inductors and output capacitors.
1. Attach the positive end of loads to the VMAIN, VGH and GND (for the negative output) pins,
respectively. Attach negative ends of the loads to GND and VGL (for the negative output) pins.
2. Attach an input voltage 2.7V ≤ VIN ≤ 5.5V and input ground to the VIN and GND pins,
respectively.
3. The demo board starts up automatically once VIN is applied due to the pull-up resistor R1. To
disable the MP1530 connect the EN pin to ground.
4. During startup RDY will be left HIGH. Once the turn-on sequence is complete, this pin will be
pulled LOW if all regulators exceed 80% of their specified voltages. After all regulators are
turned-on, a fault in any regulator will cause RDY to go HIGH after approximately 15µs. If the
fault persists for more than approximately 6ms (for CT=10nF), the entire chip will shut down.
5. To adjust the output voltages:
Use a 10kΩ to 50kΩ for the low-side resistor of each voltage divider (i.e. R7, R9 and R5).
VFB1 = VFB3 = VREF = 1.25V.
For the step-up converter, determine the high-side resistor R6 using the equation:
R6 = VMAIN − VFB1
⎜⎜⎝⎛
VFB1
R7
⎟⎟⎠⎞
Where VMAIN is the output voltage of the step-up converter.
For the positive charge-pump, determine the high-side resistor R8 by the equation:
R8 = VGH − VFB3
⎜⎜⎝⎛
VFB3
R9
⎟⎟⎠⎞
Where VGH is the output voltage of the positive linear regulator. Determine the number of
positive charge pump stages (NPOS) by:
NPOS
=
VGH
+ VDROPOUT − VMAIN
VMAIN − 2VD
Use VDROPOUT = 1V and VD = 0.4V for Schottky diodes.
For the negative charge-pump, determine the high-side resistor R4 by the equation:
R4 = −VGL
⎜⎜⎝⎛
VREF
R5
⎟⎟⎠⎞
Where VGL is the output voltage of the negative linear regulator. Determine the number of
negative charge pump stages (NNEG) by:
NNEG
=
−VGL + VDROPOUT
VMAIN − 2VD
6. Use VDROPOUT = 0.3V and VD = 0.4V for Schottky diodes.
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
EV0074 (MP1530) Rev. 1.2
www.MonolithicPower.com
5
8/23/2005
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