MC92500 Datasheet, PDF (8/42 Pages) Motorola, Inc – ATM Cell Processor

2.4.1 Ingress PHY Interface (IPHI)
The Ingress PHY Interface (IPHI) block receives cells
on a byte basis from the ATM PHY layer using the
UTOPIA standard interface. It assembles the cells and
synchronizes their arrival to the MC92500 cell process-
ing slots. Unassigned and invalid cells (Table 1 and Ta-
ble 2) are removed to provide cell rate decoupling. Also,
the MC92500 can process cells at a higher rate than
the PHY provides them, thereby creating “holes” in the
cell flow. These can be used for either cell insertion or
for maintenance access (used by the microprocessor to
maintain external memory).
2.4.2 Ingress Cell Processing Unit (IPU)
The Ingress Cell Processing Unit (IPU) operates at a
rate of one cell per cell processing slot. The cell may
have arrived from the IPHI block or may be inserted
from the Microprocessor Interface or Internal Scan
blocks. The Ingress OAM function may also insert PM
Forward Monitoring cells into the Ingress cell flow. A
cell may be inserted when an unused cell slot is avail-
able, subject to pacing by a simple leaky bucket algo-
rithm.
The IPU performs address compression on cells that
arrived from the IPHI block in order to associate the cell
with Context Table records in External Memory. The
address compression function detects inactive cells
(cells with no corresponding records in the Context Ta-
ble).
UPC/NPC is performed on a connection basis or op-
tionally on arbitrary groups of connections. The UPC/
NPC function may detect violating cells as dictated by
the selected UPC/NPC algorithm. Violating cells will
normally be tagged or discarded from the cell flow, but
an option exists to perform the UPC/NPC algorithm for
statistical purposes only without modifying or removing
the cells.
OAM processing is performed where appropriate. The
Ingress OAM function records OAM alarm cells: Alarm
Indication Signal/Remote Defect Indicator (AIS/RDI).
OAM processing for user cells involved in a perfor-
mance monitoring block test involves computing the
Bit-Interleaved Parity (BIP) and updating the Total User
Cells (TUC) count. For OAM cells the processing may
include overwriting the values of specific fields and
checking or generating the CRC-10 field.
Switch-specific overhead information is read from the
context entry and added to the cell before it is sent on
to the switch interface block. Address translation may
optionally be performed at this point.
The IPU will remove from the cell flow any OAM cell
that has reached its endpoint. Also, certain cells may be
copied to the MPIF for transfer to the microprocessor.
2.4.3 Ingress Switch Interface (ISWI)
The ISWI block contains a cell FIFO. Cells are received
from the IPU. When a full cell has been transferred, the
overhead information needed by the switch (as pro-
grammed by the user) is extracted from the internal
data structure along with the ATM header and payload
of the cell. This information is transferred to the switch
at the rate of one byte per clock cycle.
2.4.4 Egress Switch Interface (ESWI)
The ESWI block contains a cell FIFO. Data is received
from the switch at the rate of one byte per clock cycle.
The data structure received from the switch includes
overhead routing information in addition to the ATM
cell. When a full cell has been transferred, it is trans-
formed into an internal data structure and presented to
the EPU for processing.
2.4.5 Egress Cell Processing (EPU)
The Egress Cell Processing Unit (EPU) operates at the
rate of one cell per cell processing slot. The cell may
arrive from the Egress Switch Interface Block or may be
inserted from the Microprocessor Interface or Internal
Scan Blocks. The Egress OAM function may also insert
PM Forward Monitoring cells into the Egress cell flow.
The cell insertion is paced by a simple leaky bucket al-
gorithm.
The first stage of the Egress cell processing is perform-
ing multicast translation, if needed. Then the EPU per-
forms OAM processing where appropriate. The Egress
OAM function records OAM Alarm cells. OAM process-
ing for user cells involved in a Performance Monitoring
block test is limited to computing the bit-interleaved par-
ity and updating the Total User Cells count. For OAM
cells the processing may include over-writing the values
of specific fields and checking or generating the CRC-
10 field.
Address translation is performed to replace the address
fields of the ATM cell header with the address of the
outgoing link.The EPU will remove from the cell flow
any OAM cell that has reached its endpoint. Also, cer-
tain cells may be copied to the MPIF for transfer to the
microprocessor.
MOTOROLA
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MC92500