MC141543 Datasheet, PDF (6/14 Pages) Motorola, Inc – Advanced Monitor On-Screen Display

ADDRESS
BIT
FORMAT
7 654321 0
ÎÎÎÎÎÎÎÎÎÎÎÎÎ _ROW
1 X X X D D D D a, b, c
ÎÎÎÎÎÎÎÎÎÎÎÎÎ _{COLUMN 0 0 X D D D D D a,b}
ÎÎÎÎÎÎÎÎÎÎÎÎÎ _{COLUMN 0 1 X D D D D D c}
ÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{X: don’t care}
D: valid data
Figure 4. Row & Column Address Bit Patterns
MEMORY MANAGEMENT
Internal RAM is addressed with row and column (coln)
numbers in sequence. The spaces between Row 0 and Coln
0 to Row 14 and Coln 29 are called display registers, and
each contains a character ROM address corresponding to a
display location on the monitor screen. Every data row is
associated with two control registers, which are located at
Coln 30 and 31 of their respective rows, to control the char-
acter display format of that row. In addition, three window
control registers for each of the three windows, together with
three frame control registers, occupy the first 13 columns of
Row 15.
The user should handle the internal RAM address location
with care, especially those rows with double length alphanu-
meric symbols. For example, if Row n is destined to be
double height on the memory map, the data displayed on
screen Rows n and n+1 will be represented by the data con-
tained in the memory address of Row n only. The data of the
next Row n+1 on the memory map will appear on the screen
as n+2 and n+3 row space, and so on. Hence, it is not neces-
sary to load a row of blank data to compensate for the double
row. The user should minimize excessive rows of data in
memory in order to avoid overrunning the limited amount of
row space on the screen.
For rows with double width alphanumeric symbols, only
the data contained in the even numbered columns of the
memory map are shown. Odd numbered columns are
treated in the same manner as double height rows.
0
14
ÎÎÎÎÎÎÎÎ⁰ _{ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎDÎÎÎÎÎÎÎÎISPLAÎÎÎÎÎÎÎÎ}^CYORLE_{ÎÎÎÎÎÎÎÎ}^UGMISNT_{ÎÎÎÎÎÎÎÎERSÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ}²⁷ _{ÎÎÎÎÎÎÎÎ}^{28 2}_{ÎÎÎÎÎÎÎÎ}^{9 30}_{ÎÎÎÎÎÎÎÎ}³¹_{ÎÎÎÎÎÎÎÎ}
0
23
56
89
12
15 WINDOW 1 WINDOW 2 WINDOW 3 FRAME CRTL REG
WINDOW AND FRAME CONTROL REGISTERS
Figure 5. Memory Map
MC141543
6
MOTOROLA