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MTW32N20E Datasheet, PDF (5/8 Pages) Motorola, Inc – TMOS POWER FET 32 AMPERES 200 VOLTS RDS(on) = 0.075 OHM
20
200
TJ = 25°C
180
16
VDS
ID = 32 A
VDS = 160 V
160
140
12
120
QT
100
8
Q1
Q2
80
VGS
60
4
40
20
0
Q3
0
0 10 20 30 40 50 60 70 80 90 100
QT, TOTAL CHARGE (nC)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
1000
TJ = 25°C
ID = 32 A
200 VDD = 100 V
100 VGS = 10 V
20
10
MTW32N20E
td(off) tr
tf
td(on)
2
1
1
2
10
20
100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
30 TJ = 25°C
VGS = 0 V
20
10
0
0
0.2
0.4
0.6
0.8
1
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define the
maximum simultaneous drain–to–source voltage and drain
current that a transistor can handle safely when it is forward
biased. Curves are based upon maximum peak junction tem-
perature and a case temperature (TC) of 25°C. Peak repetitive
pulsed power limits are determined by using the thermal re-
sponse data in conjunction with the procedures discussed in
AN569, “Transient Thermal Resistance–General Data and Its
Use.”
Switching between the off–state and the on–state may tra-
verse any load line provided neither rated peak current (IDM)
nor rated voltage (VDSS) is exceeded and the transition time
(tr,tf) do not exceed 10µs. In addition the total power averaged
over a complete switching cycle must not exceed (TJ(MAX) –
TC)/(RθJC).
A Power MOSFET designated E–FET can be safely used in
switching circuits with unclamped inductive loads. For reliable
operation, the stored energy from circuit inductance dissi-
pated in the transistor while in avalanche must be less than
the rated limit and adjusted for operating conditions differing
from those specified. Although industry practice is to rate in
terms of energy, avalanche energy capability is not a con-
stant. The energy rating decreases non–linearly with an in-
crease of peak current in avalanche and peak junction
temperature.
Although many E–FETs can withstand the stress of drain–
to–source avalanche at currents up to rated pulsed current
(IDM), the energy rating is specified at rated continuous cur-
rent (ID), in accordance with industry custom. The energy rat-
ing must be derated for temperature as shown in the
accompanying graph (Figure 12). Maximum energy at cur-
rents below rated continuous ID can safely be assumed to
equal the values indicated.
Motorola TMOS Power MOSFET Transistor Device Data
5