MPC962305 Datasheet, PDF (5/12 Pages) Motorola, Inc – Low-Cost 3.3 V Zero Delay Buffer

Freescale Semiconductor, Inc.
MPC962305 MPC962309
APPLICATIONS INFORMATION
V_CC
1.4 V
GND
V_CC
1.4 V
GND
t₅
The pin-to-pin skew is defined as the worst case difference in propagation
delay between any similar delay path within a single device
Figure 1. Output-to-Output Skew t_SK(O)
CCLK
FB_IN
t₆
V_CC
V_CC ÷ 2
GND
V_CC
V_CC ÷ 2
GND
Figure 2. Static Phase Offset Test Reference
t₂
t₁
DC = t₂/t₁ x 100%
V_CC
1.4 V
GND
The time from the PLL controlled edge to the non-controlled
edge, divided by the time between PLL controlled edges,
expressed as a percentage
Figure 3. Output Duty Cycle (DC)
t_N
t_N+1
t_J = |t_N–t_N+1|
The variation in cycle time of a signal between adjacent cycles,
over a random sample of adjacent cycle pairs
Figure 5. Cycle-to-Cycle Jitter
DEVICE 1
DEVICE 2
t₇
V_CC
V_CC ÷ 2
GND
V_CC
V_CC ÷ 2
GND
Figure 4. Device-to-Device Skew
V_CC = 3.3 V
2.0
0.8
t₄
t₃
Figure 6. Output Transition Time Test Reference
MOTOROLA
For More Informat⁵ion On This Product,
Go to: www.freescale.com
TIMING SOLUTIONS