MC146818A Datasheet, PDF (4/20 Pages) Motorola, Inc – HIGH-PERFORMANCE SILIICON-GATE COMPLEMENTARY MOS

BUS TIMING
Ident.
Number
Characteristi~
VDD=5.O V
*lo%
Vnn=3.O V
1 TTL and
ti;F Load
130 pF Load
Symbol Min
Max
Min
Max
Unit
—
1
Cycle Time
2
Pulse Width, DS/E Low or ~D/WR High
——
3
Pulse Width, DS/E High or RD/WR Low
tcvc
5000
–
953
dc
ns
PWEL
lm
—
300
–
ns
PWEH
15m
—
325
–
ns
4
Input Rise and Fall Time
tr, tf
—
100
—
30
ns
8
R/~ Hold Time
13
R/~ Setup Time Before DS/E
14
Chip Select Setup Time Before DS, ~R, or ~D
15
Chip Select Hold Time
18
Read Data Hold Time
tRWH
10
–
tRWS
2m
–
tcs
200
–
10
80
–
—
~ⁿs^s*.%#*“+.^~..,$<^{,..:.$,.,,.,:.{}
25
—
~,:,.m
tCH
10
—
o
—
~~~;~e.:
,,~r$
tDHR
10
Im
10
21
Write Data Hold Time
tnu\A/
100
–
o
24
Muxed Address Valid Time to AS/ALE Fall
25 I Muxed Address Hold Time
I ^tASL
tAHL_—
2~
–
100 I –
I 50 ,~p+:;a “’ I
w ^{~“*t.~. y..>“s>-..,’}
n:SI
I ^ns
26
DelaV Time DS/E to AS/ALE Rise
tASD
m
–
, ‘*
‘ .-
ns
27
Pulse Width, AS/ALE High
pwAs H
6~
– *,i$ ;~J$$95
—
ns
28
DelaV Time, AS/ALE to DS/E Rise
tASED
500
* %:a.\xtf.,..!,>:/.?@
—
ns
30
Peripheral Output Data Delay Time from DS/ E or ~
tDDR
1300
.,~.,~.,.?.‘.,’!..~~,
‘.?.?~i~:,.
20
240
ns
31
Peripheral Data Setup Time
tDSW
1q$.ii ~. ~’
2m
–
ns
32
S~ Setup Time before AS/ALE Rise
tSBS
~Q:@:J~$+’3–’
TBD
–
33
S~ Hold Time after AS/ALE Fall
tSBH
$~B~~ ~ _
.,......
TBD
–
NOTE: Designations E, ALE, ~, and ~R refer to signals from alternative Mp;cessor
‘~+.k
* Refer to IMPORTANT NOTICES appearing on page 20 of this data :~~t,
.
.,
signals.
-.
Note: VHIGH=VDD–2.O
V, VLOW=O.8 V, for VDD=5.O V +IOYO for outputs only.
VHIGH=2.O V, VLOW=O.5 V, for VDD=3.O V for outputs onlv.
MOTOROLA
@
Semiconductor Products Inc.
4