MC14500B Datasheet, PDF (4/8 Pages) Motorola, Inc – Industrial Control Unit

1M
100 k
10 k
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _10kΩ
100 kΩ
1 MΩ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{RC, CLOCK FREQUENCY RESISTOR}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Figure 1. Typical Clock Frequency}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{versus Resistor (RC)}
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Function
Chip Reset
Write Pulse
Data In/Out
MSB Instruction Word
Bit 2 Instruction Word
Bit 1 Instruction Word
LSB Instruction Word
Negative Supply (Ground)
Flag on NOP F
Flag on NOP O
Subroutine Return Flag
Jump Instruction Flag
Oscillator Input
Oscillator Output
Result Register
Positive Supply
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Instruction Code}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ₀
0000
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ¹
0001
2
0010
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ₃
0011
4
0100
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ₅
0101
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ₆
0110
7
0111
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ₈
1000
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ₉
1001
A
1010
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _B
1011
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ C
1100
D
1101
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _E
1110
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ F
1111
Table 1. MC14500B Instruction Set
Mnemonic
NOPO
LD
LDC
AND
ANDC
OR
ORC
XNOR
STO
STOC
IEN
OEN
JMP
RTN
SKZ
NOPF
Action
³ ³ No change in registers. RR RR, Flag O
³ Load result register. Data RR
³ Load complement. Data RR
³ Logical AND. RR  Data RR
³ Logical AND complement. RR  Data RR
³ Logical OR. RR + Data RR
³ Logical OR complement. RR + Data RR
³ Exclusive NOR. If RR = Data, RR 1
³ ³ Store. RR Data Pin, Write
³ ³ Store complement. RR Data Pin, Write
³ Input enable. Data IEN Register
³ Output enable. Data OEN Register
³ Jump. JMP Flag
³ Return. RTN Flag
and skip next instruction
³ ³ ^{Skip next instruction if RR = 0}
No change in registers. RR RR, Flag F
Symbols
RST
Write
Data
I3
I2
I1
I0
VSS
Flag F
Flag O
RTN
JMP
X2
X1
RR
VDD
ADDITIONAL
OUTPUT DEVICES
MEMORY
I/O ADDRESS
MC14599B
8–BIT ADDRESSABLE LATCH
WITH BIDIRECTIONAL DATA
8
OUTPUTS
MC14512
8–CHANNEL
DATA SELECTOR
8
INPUTS
TO PERIPHERAL
DEVICES
PROGRAM
COUNTER
CLOCK
I0, I1, I2, I3
MC14500B
ICU
DATA
ADDITIONAL
INPUT DEVICES
Figure 2. Outline of a Typical Organization for a MC14500B–Based System
MOTOROLA CMOS LOGIC DATA
MC14500B
309