MCM6728B Datasheet, PDF (3/8 Pages) Motorola, Inc – 256K x 4 Bit Fast Static Random Access Memory

CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested)
Parameter
Symbol
Typ
Address Input Capacitance
Control Pin Input Capacitance
Cin
—
Cin
—
Input/Output Capacitance
CI/O
—
Max
Unit
6
pF
6
pF
8
pF
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V ± 10%, TA = 0 to + 70°C, Unless Otherwise Noted)
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 ns
Output Timing Measurement Reference Level . . . . . . . . . . . . . 1.5 V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1A
READ CYCLE TIMING (See Notes 1 and 2)
6728B–8
6728B–10
6728B–12
Parameter
Symbol Min Max Min Max Min Max Unit Notes
Read Cycle Time
tAVAV
8
—
10
—
12
—
ns
3
Address Access Time
tAVQV
—
8
—
10
—
12
ns
Enable Access Time
tELQV
—
8
—
10
—
12
ns
Output Hold from Address Change
tAXQX
3
—
3
—
3
—
ns
Enable Low to Output Active
tELQX
3
—
3
—
3
—
ns 4,5,6
Enable High to Output High–Z
tEHQZ
0
4
0
5
0
6
ns 4,5,6
NOTES:
1. W is high for read cycle.
2. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycles.
3. All read cycle timings are referenced from the last valid address to the first transitioning address.
4. At any given voltage and temperature, tEHQZ max < tELQX min, for a given device.
5. Transition is measured 200 mV from steady–state voltage with load of Figure 1B.
6. This parameter is sampled and not 100% tested.
7. Device is continuously selected (E = VIL).
8. Addresses valid prior to or coincident with E going low.
OUTPUT
AC TEST LOADS
Z0 = 50 Ω
RL = 50 Ω
VL = 1.5 V
OUTPUT
255 Ω
+5 V
480 Ω
5 pF
Figure 1A
Figure 1B
TIMING LIMITS
The table of timing values shows either a
minimum or a maximum limit for each param-
eter. Input requirements are specified from
the external system point of view. Thus, ad-
dress setup time is shown as a minimum
since the system must supply at least that
much time (even though most devices do not
require it). On the other hand, responses from
the memory are specified from the device
point of view. Thus, the access time is shown
as a maximum since the device never pro-
vides data later than that time.
MOTOROLA FAST SRAM
MCM6728B
3