MC74VHCT00A Datasheet, PDF (3/5 Pages) Motorola, Inc – Quad 2-Input NAND Gate

MC74VHCT00A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPHL
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Cin
Parameter
Propagation Delay, A or B to Y
Input Capacitance
Test Conditions
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
TA = 25°C
Min
Typ
Max
5.0
6.9
5.5
7.9
4
10
TA = – 40 to 85°C
Min
Max Unit
1.0
8.0
1.0
9.0
10
pF
Typical @ 25°C, VCC = 5.0V
CPD Power Dissipation Capacitance (Note NO TAG)
17
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Averageoperating current can be obtained by the equation: ICC(OPR₎ = CPD  VCC  fin + ICC / 4 (per gate). CPD is used to determine the no–load
dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V, Measured in SOIC Package)
TA = 25°C
Symbol
Characteristic
Typ
Max
Unit
VOLP
VOLV
VIHD
VILD
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
0.4
0.8
V
– 0.4
– 0.8
V
2.0
V
0.8
V
A or B
Y
1.5V
tPLH
1.5V
3V
GND
tPHL
VOH
VOL
Figure 1. Switching Waveforms
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
* Includes all probe and jig capacitance
Figure 2. Test Circuit
VHC Data – Advanced CMOS Logic
3
DL203 — Rev 1
MOTOROLA