MC74VHC02 Datasheet, PDF (3/5 Pages) Motorola, Inc – Quad 2-Input NOR Gate

MC74VHC02
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{DC ELECTRICAL CHARACTERISTICS}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Iin
Maximum Input
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Leakage Current
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ICC MaximumQuiescent
Supply Current
Test Conditions
Vin = 5.5 V or GND
Vin = VCC or GND
VCC
V
0 to 5.5
TA = 25°C
Min
Typ
Max
± 0.1
5.5
2.0
TA = – 40 to 85°C
Min
Max Unit
± 1.0
µA
20.0
µA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPHL
Parameter
Maximum Propagation Delay,
Input A or B to Output Y
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Cin
Maximum Input Capacitance
Test Conditions
VCC = 3.3 ± 0.3V
VCC = 5.0 ± 0.5V
CL = 15pF
CL = 50pF
CL = 15pF
CL = 50pF
TA = 25°C
Min
Typ
Max
5.6
7.9
8.1
11.4
3.6
5.5
5.1
7.5
4
10
TA = – 40 to 85°C
Min
Max Unit
1.0
9.5
ns
1.0
13.0
1.0
6.5
1.0
8.5
10
pF
Typical @ 25°C, VCC = 5.0V
CPD Power Dissipation Capacitance (Note 1.)
15
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Averageoperating current can be obtained by the equation: ICC(OPR₎ = CPD  VCC  fin + ICC / 4 (per gate). CPD is used to determine the no–load
dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
Symbol
VOLP
VOLV
VIHD
VILD
Characteristic
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
TA = 25°C
Typ
Max
Unit
0.3
0.8
V
– 0.3
– 0.8
V
3.5
V
1.5
V
A or B
50%
tPLH
Y 50% VCC
VCC
GND
tPHL
Figure 1. Switching Waveforms
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
* Includes all probe and jig capacitance
Figure 2. Test Circuit
INPUT
VHC Data – Advanced CMOS Logic
DL203 — Rev 1
Figure 3. Input Equivalent Circuit
3
MOTOROLA