MC5474HCT00A Datasheet, PDF (3/5 Pages) Motorola, Inc – High–Performance Silicon–Gate CMOS

MC54/74HCT00A
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{AC CHARACTERISTICS FOR THE MC54/74HCT00A (VCC = 5.0 V ± 10%, CL = 50 pF, Input tr = tf = 6.0 ns)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Guaranteed Limits}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{– 55 to 25_C}
v85_C
v125_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Fig.
Min Max Min Max Min Max Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^tPHL
Maximum Propagation Delay, Input A
or B to Output Y
1, 2
19
24
28
ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTLH,
tTHL
Maximum Output Transition
Time, Any Output
1, 2
15
19
22
ns
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Cin
Maximum Input Capacitance
—
10
10
10
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–
Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Per Gate)*
15
pF
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
INPUT 90%
A OR B ^{1.3 V}
10%
tf
tPLH
OUTPUT Y
90%
1.3 V
10%
tTLH
tr
3.0 V
GND
tPHL
tTHL
Figure 1. Switching Waveforms
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
CL*
3
* Includes all probe and jig capacitance
Figure 2. Test Circuit
EXPANDED LOGIC DIAGRAM
(1/4 OF THE DEVICE)
A
Y
B
High–Speed CMOS Logic Data
3
DL129 — Rev 6
MOTOROLA