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MC33984 Datasheet, PDF (20/28 Pages) Motorola, Inc – Dual Intelligent High-Current Self-Protected Silicon High-Side Switch (4.0 mΩ)
Freescale Semiconductor, Inc.
Previous Address SOA[2:0]=000
If the previous three MSBs are 000, bits OD6:OD0 will reflect
the current state of the Fault register (FLTR) corresponding to
the output previously selected with the bit OD7 (Table 9).
Table 9. Fault Register
OD7 OD6 OD5 OD4 OD3 OD2 OD1 OD0
s OTF OCHFs OCLFs OLFs UVF OVF FAULTs
OD7 (s) = Selection of output: logic [0] = HS0, logic [1] = HS1.
OD6 (OTF) = Overtemperature Flag.
OD5 (OCHFs) = Overcurrent High Flag. (This fault is latched.)
OD4 (OCLFs) = Overcurrent Low Flag. (This fault is latched.)
OD3 (OLFs) = Open Load Flag.
OD2 (UVF) = Undervoltage Flag. (This fault is latched or not latched.)
OD1 (OVF) = Overvoltage Flag.
OD0 (FAULTs) = This flag reports a fault and is reset by a read
operation.
Note The FS terminal reports a fault. For latched faults, this terminal
is reset by a new Switch ON command (via SPI or direct input IN).
Previous Address SOA[2:0]=001
Data in bits OD1:OD0 contain CSNS0 EN and IN0_SPI
programmed bits, respectively. Data in bits OD3:OD2 contain
CSNS0 EN and IN0_SPI programmed bits, respectively.
Previous Address SOA[2:0]=010
The data in bit OD3 contain the programmed overcurrent
high detection level (refer to Table 4, page 17), and the data in
bits OD2:OD0 contain the programmed overcurrent low
detection levels (refer to Table 3, page 17).
Previous Address SOA[2:0]=011
Data returned in bits OD1 and OD0 are current values for the
overcurrent fault blanking time, illustrated in Table 5, page 18.
Bit OD2 reports if the overcurrent detection timeout feature is
active. OD3 reports if the open load circuitry is active.
Previous Address SOA[2:0]=100
The returned data contain the programmed values in the
DICR.
Previous Address SOA[2:0]=101
• SOA3 = 0. The returned data contain the programmed
values in the OSDR. Bit OD3 (FSM_HS0) reflects the
state of the output HS0 in the Fail-Safe mode after a
watchdog timeout occurs.
• SOA3 = 1. The returned data contain the programmed
values in the WDR. Bit OD2 (WDTO) reflects the status of
the watchdog circuitry. If WDTO bit is logic [1], the
watchdog has timed out and the device is in Fail-Safe
mode. If WDTO is logic [0], the device is in Normal mode
(assuming the device is powered and not in Sleep mode),
with the watchdog either enabled or disabled. Bit OD3
(FSM_HS1) reflects the state of the output HS1 in the Fail-
Safe mode after a watchdog timeout occurs.
Previous Address SOA[2:0] =110
• SOA3 = 0. OD3:OD0 return the state of the IN1, IN0, FSI,
and WAKE terminals, respectively (Table 10).
Table 10. Terminal Register
OD3
OD2
OD1
OD0
IN1 Terminal IN0 Terminal FSI Terminal WAKE Terminal
• SOA3 = 1. The returned data contain the programmed
values in the UOVR. Bit OD1 reflects the state of the
undervoltage protection and bit OD0 reflects the state of
the overvoltage protection (refer to Table 8, page 19).
Previous Address SOA[2:0]=111
Null Data. No previous register Read Back command
received, so bits OD2:OD0 are null, or 000.
33984
20
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
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