MC145537EVK Datasheet, PDF (2/4 Pages) Motorola, Inc – MC14LC5540 ADPCM Codec Evaluation Kit

GENERAL OVERVIEW
The MC14LC5540 ADPCM Codec is a single–chip imple-
mentation of a PCM Codec–Filter and an ADPCM Encoder/
Decoder, and therefore provides an efficient solution for
applications requiring the digitization and compression of
voiceband signals. This device is designed to operate over a
wide voltage range, 2.7 to 5.25 V, and as such is ideal for
battery powered as well as ac powered applications. The
MC14LC5540 ADPCM Codec also includes a serial control
port and internal control and status registers that permit a mi-
crocomputer to exercise many built–in features.
The MC14LC5540 ADPCM Codec is designed to meet the
32 kbps ADPCM conformance requirements of CCITT Rec-
ommendation G.721 and ANSI T1.301. It also meets ANSI
T1.303 and CCITT Recommendation G.723 for 24 kbps
ADPCM operation, and the 16 kbps ADPCM standard,
CCITT Recommendation G.726. This device also meets the
64 kbps PCM conformance specification of the CCITT G.714
Recommendation.
The MC145537EVK is the evaluation board for the
MC14LC5540 ADPCM Codec. This board provides the clock
generation that controls both the transfer of PCM and
ADPCM data into and out of the MC14LC5540, as well as
determining the data compression rate (16 kbps ADPCM, 24
kbps ADPCM, 32 kbps ADPCM, or 64 kbps PCM) for the
ADPCM transcoder function. This data compression rate is
determined by the duration of the transmit and receive frame
synchronization pulses measured in data clock cycles, which
are programmed by an 8–position DIP switch. This evalua-
tion board has voltage level shifters that allow the
MC14LC5540 to operate at a voltage lower than the + 5 V
supply required for the clock generator and microcontroller.
This MC145537EVK has an MC68HC705C8P microcon-
troller, which is running a monitor routine that interfaces the
MC14LC5540 to a 9600 bps EIA–232 port for access by a
computer terminal. The microcontroller provides access to
the programming registers of the MC14LC5540 for read and
write operations. This facilitates exercising both the hard-
ware options for trim gain, sidetone, analog signal routing
and charge–pump operation, and the software options of the
dual tone generator, noise burst detect and receive gain con-
trol. The evaluation board is designed to configure the
MC14LC5540 after reset such that the charge–pump is oper-
ating and the device is encoding and decoding analog at the
rate determined by the clock circuitry. This allows the
MC145537EVK to be functional without a computer terminal.
MC145537EVK
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MOTOROLA